| /openbsd-src/gnu/llvm/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 9437 EVT NarrowVT = LeftOp.getOperand(0).getValueType(); in combineShiftToMULH() local
9438 unsigned NarrowVTSize = NarrowVT.getScalarSizeInBits(); in combineShiftToMULH()
9457 TLI.isOperationLegalOrCustom(MulLoHiOp, NarrowVT) && in combineShiftToMULH()
9470 Constant->getAPIntValue().trunc(NarrowVT.getScalarSizeInBits()), DL, in combineShiftToMULH()
9471 NarrowVT); in combineShiftToMULH()
9476 if (NarrowVT != RightOp.getOperand(0).getValueType()) in combineShiftToMULH()
9503 if (!TLI.isOperationLegalOrCustom(MulhOpcode, NarrowVT)) in combineShiftToMULH()
9507 DAG.getNode(MulhOpcode, DL, NarrowVT, LeftOp.getOperand(0), MulhRightOp); in combineShiftToMULH()
11371 EVT NarrowVT = LHS.getValueType(); in visitVSELECT() local
11380 TLI.isLoadExtLegalOrCustom(LoadExtOpcode, WideVT, NarrowVT) && in visitVSELECT()
[all …]
|
| H A D | LegalizeVectorTypes.cpp | 5514 EVT NarrowVT = ((ScalarBits0 < ScalarBits1) ? VT0 : VT1); in WidenVSELECTMask() local
5515 EVT WideVT = ((NarrowVT == VT0) ? VT1 : VT0); in WidenVSELECTMask()
5518 else if (ScalarBits_ToMask <= NarrowVT.getScalarSizeInBits()) in WidenVSELECTMask()
5519 MaskVT = NarrowVT; in WidenVSELECTMask()
|
| H A D | TargetLowering.cpp | 3755 EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(), in foldSetCCWithAnd() local
3757 if (isTruncateFree(OpVT, NarrowVT) && isTypeLegal(NarrowVT)) { in foldSetCCWithAnd()
3758 SDValue Trunc = DAG.getZExtOrTrunc(N0.getOperand(0), DL, NarrowVT); in foldSetCCWithAnd()
3759 SDValue Zero = DAG.getConstant(0, DL, NarrowVT); in foldSetCCWithAnd()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 4186 EVT NarrowVT = Node->getMemoryVT(); in lowerATOMIC_LOAD_OP() local
4188 if (NarrowVT == WideVT) in lowerATOMIC_LOAD_OP()
4191 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_LOAD_OP()
4239 NarrowVT, MMO); in lowerATOMIC_LOAD_OP()
4301 EVT NarrowVT = Node->getMemoryVT(); in lowerATOMIC_CMP_SWAP() local
4302 EVT WideVT = NarrowVT == MVT::i64 ? MVT::i64 : MVT::i32; in lowerATOMIC_CMP_SWAP()
4303 if (NarrowVT == WideVT) { in lowerATOMIC_CMP_SWAP()
4307 DL, Tys, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
4319 int64_t BitSize = NarrowVT.getSizeInBits(); in lowerATOMIC_CMP_SWAP()
4342 VTList, Ops, NarrowVT, MMO); in lowerATOMIC_CMP_SWAP()
[all …]
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelDAGToDAG.cpp | 2312 EVT NarrowVT = N->getOperand(0)->getValueType(0); in tryBitfieldExtractOpFromSExt() local
2313 if (VT != MVT::i64 || NarrowVT != MVT::i32) in tryBitfieldExtractOpFromSExt()
2325 unsigned Imms = NarrowVT.getSizeInBits() - 1; in tryBitfieldExtractOpFromSExt()
2340 EVT NarrowVT = Extract.getValueType(); in tryHighFPExt() local
2341 if ((VT != MVT::v2f64 || NarrowVT != MVT::v2f32) && in tryHighFPExt()
2342 (VT != MVT::v4f32 || NarrowVT != MVT::v4f16)) in tryHighFPExt()
|
| H A D | AArch64ISelLowering.cpp | 12741 EVT NarrowVT = getPackedSVEVectorVT(VT.getVectorElementCount()); in LowerINSERT_SUBVECTOR() local
12746 Vec0 = getSVESafeBitCast(NarrowVT, Vec0, DAG); in LowerINSERT_SUBVECTOR()
12759 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, Vec1, HiVec0); in LowerINSERT_SUBVECTOR()
12764 Narrow = DAG.getNode(AArch64ISD::UZP1, DL, NarrowVT, LoVec0, Vec1); in LowerINSERT_SUBVECTOR()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 987 MVT NarrowVT = VT == MVT::v32i16 ? MVT::v16i16 : MVT::v32i8; in PreprocessISelDAG() local
990 CurDAG->getNode(X86ISD::VBROADCAST, dl, NarrowVT, N->getOperand(0)); in PreprocessISelDAG()
1011 MVT NarrowVT = VT == MVT::v32i16 ? MVT::v16i16 : MVT::v32i8; in PreprocessISelDAG() local
1014 SDVTList VTs = CurDAG->getVTList(NarrowVT, MVT::Other); in PreprocessISelDAG()
|
| H A D | X86ISelLowering.cpp | 11445 MVT NarrowVT = MVT::getVectorVT(EltVT, 4); in LowerBUILD_VECTOR() local
11448 DAG.getBuildVector(NarrowVT, dl, Ops)); in LowerBUILD_VECTOR()
48717 EVT NarrowVT = Narrow.getValueType(); in PromoteMaskArithmetic() local
48728 return DAG.getZeroExtendInReg(Op, DL, NarrowVT); in PromoteMaskArithmetic()
48731 Op, DAG.getValueType(NarrowVT)); in PromoteMaskArithmetic()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 9027 MVT NarrowVT = getNarrowType(Root); in getOrCreateExtendedOp() local
9030 if (Source.getValueType() == NarrowVT) in getOrCreateExtendedOp()
9041 return DAG.getNode(ExtOpc, DL, NarrowVT, Source, Mask, VL); in getOrCreateExtendedOp()
9043 return DAG.getNode(RISCVISD::VMV_V_X_VL, DL, NarrowVT, in getOrCreateExtendedOp()
9044 DAG.getUNDEF(NarrowVT), Source.getOperand(1), VL); in getOrCreateExtendedOp()
9064 MVT NarrowVT = MVT::getVectorVT(MVT::getIntegerVT(NarrowSize), in getNarrowType() local
9066 return NarrowVT; in getNarrowType()
|
| /openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 9687 EVT NarrowVT = EVT::getIntegerVT(*DAG.getContext(), Bits); in performAndCombine() local
9689 DAG.getValueType(NarrowVT)); in performAndCombine()
|