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Searched refs:MachineRegisterInfo (Results 1 – 25 of 442) sorted by relevance

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/openbsd-src/gnu/llvm/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.h41 MachineRegisterInfo &MRI,
44 bool legalizeAddrSpaceCast(MachineInstr &MI, MachineRegisterInfo &MRI,
46 bool legalizeFrint(MachineInstr &MI, MachineRegisterInfo &MRI,
48 bool legalizeFceil(MachineInstr &MI, MachineRegisterInfo &MRI,
50 bool legalizeFrem(MachineInstr &MI, MachineRegisterInfo &MRI,
52 bool legalizeIntrinsicTrunc(MachineInstr &MI, MachineRegisterInfo &MRI,
54 bool legalizeITOFP(MachineInstr &MI, MachineRegisterInfo &MRI,
56 bool legalizeFPTOI(MachineInstr &MI, MachineRegisterInfo &MRI,
59 bool legalizeExtractVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
61 bool legalizeInsertVectorElt(MachineInstr &MI, MachineRegisterInfo &MRI,
[all …]
H A DAMDGPURegisterBankInfo.h53 MachineRegisterInfo &MRI,
60 MachineRegisterInfo &MRI) const;
62 Register buildReadFirstLane(MachineIRBuilder &B, MachineRegisterInfo &MRI,
67 MachineRegisterInfo &MRI,
70 MachineRegisterInfo &MRI,
73 void constrainOpWithReadfirstlane(MachineInstr &MI, MachineRegisterInfo &MRI,
77 MachineRegisterInfo &MRI) const;
80 MachineRegisterInfo &MRI) const;
84 MachineRegisterInfo &MRI, int RSrcIdx) const;
91 Register handleD16VData(MachineIRBuilder &B, MachineRegisterInfo &MRI,
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H A DGCNRegPressure.h26 class MachineRegisterInfo; variable
71 const MachineRegisterInfo &MRI);
93 static unsigned getRegKind(Register Reg, const MachineRegisterInfo &MRI);
117 mutable const MachineRegisterInfo *MRI = nullptr;
197 const MachineRegisterInfo &MRI);
201 const MachineRegisterInfo &MRI);
260 GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI, in getRegPressure()
274 const MachineRegisterInfo &MRI);
H A DSIRegisterInfo.h195 bool isSGPRReg(const MachineRegisterInfo &MRI, Register Reg) const;
272 MCRegister findUnusedRegister(const MachineRegisterInfo &MRI,
277 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
280 getRegClassForOperandReg(const MachineRegisterInfo &MRI,
283 bool isVGPR(const MachineRegisterInfo &MRI, Register Reg) const;
284 bool isAGPR(const MachineRegisterInfo &MRI, Register Reg) const;
285 bool isVectorRegister(const MachineRegisterInfo &MRI, Register Reg) const { in isVectorRegister()
324 const MachineRegisterInfo &MRI) const override;
349 MachineRegisterInfo &MRI,
H A DSIInstrInfo.h34 class MachineRegisterInfo; variable
69 MachineRegisterInfo &MRI,
75 MachineRegisterInfo &MRI,
123 MachineRegisterInfo &MRI,
126 void addUsersToMoveToVALUWorklist(Register Reg, MachineRegisterInfo &MRI,
332 const MachineRegisterInfo *MRI) const override;
343 MachineRegisterInfo *MRI) const final;
796 const MachineRegisterInfo &MRI = MF.getRegInfo(); in isVGPRCopy()
802 const MachineRegisterInfo &MRI = MF.getRegInfo(); in hasVGPRUses()
816 bool mayReadEXEC(const MachineRegisterInfo &MRI, const MachineInstr &MI) const;
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/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h40 class MachineRegisterInfo; variable
89 Register constrainRegToClass(MachineRegisterInfo &MRI,
104 MachineRegisterInfo &MRI,
123 MachineRegisterInfo &MRI,
145 bool canReplaceReg(Register DstReg, Register SrcReg, MachineRegisterInfo &MRI);
149 bool isTriviallyDead(const MachineInstr &MI, const MachineRegisterInfo &MRI);
170 const MachineRegisterInfo &MRI);
174 const MachineRegisterInfo &MRI);
187 const MachineRegisterInfo &MRI,
193 Register VReg, const MachineRegisterInfo &MRI,
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H A DMIPatternMatch.h25 [[nodiscard]] bool mi_match(Reg R, const MachineRegisterInfo &MRI, in mi_match()
31 [[nodiscard]] bool mi_match(MachineInstr &MI, const MachineRegisterInfo &MRI, in mi_match()
41 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
55 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
67 const MachineRegisterInfo &);
71 const MachineRegisterInfo &MRI) { in matchConstant()
77 const MachineRegisterInfo &MRI) { in matchConstant()
84 bool match(const MachineRegisterInfo &MRI, Register Reg) { in match()
102 const MachineRegisterInfo &);
106 const MachineRegisterInfo &MRI) { in matchConstantSplat()
[all …]
H A DLoadStoreOpt.h33 class MachineRegisterInfo; variable
44 BaseIndexOffset getPointerInfo(Register Ptr, MachineRegisterInfo &MRI);
50 bool &IsAlias, MachineRegisterInfo &MRI);
57 MachineRegisterInfo &MRI, AliasAnalysis *AA);
71 MachineRegisterInfo *MRI;
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/
H A DMachineRegisterInfo.cpp41 void MachineRegisterInfo::Delegate::anchor() {} in anchor()
43 MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF) in MachineRegisterInfo() function in MachineRegisterInfo
57 MachineRegisterInfo::setRegClass(Register Reg, const TargetRegisterClass *RC) { in setRegClass()
62 void MachineRegisterInfo::setRegBank(Register Reg, in setRegBank()
68 constrainRegClass(MachineRegisterInfo &MRI, Register Reg, in constrainRegClass()
83 const TargetRegisterClass *MachineRegisterInfo::constrainRegClass( in constrainRegClass()
91 MachineRegisterInfo::constrainRegAttrs(Register Reg, in constrainRegAttrs()
121 MachineRegisterInfo::recomputeRegClass(Register Reg) { in recomputeRegClass()
145 Register MachineRegisterInfo::createIncompleteVirtualRegister(StringRef Name) { in createIncompleteVirtualRegister()
157 MachineRegisterInfo::createVirtualRegister(const TargetRegisterClass *RegClass, in createVirtualRegister()
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H A DMIRVRegNamerUtils.h29 class MachineRegisterInfo; variable
48 MachineRegisterInfo &MRI;
85 VRegRenamer(MachineRegisterInfo &MRI) : MRI(MRI) {} in VRegRenamer()
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/GISel/
H A DAArch64LegalizerInfo.h37 bool legalizeVaArg(MachineInstr &MI, MachineRegisterInfo &MRI,
39 bool legalizeLoadStore(MachineInstr &MI, MachineRegisterInfo &MRI,
42 bool legalizeShlAshrLshr(MachineInstr &MI, MachineRegisterInfo &MRI,
46 bool legalizeSmallCMGlobalValue(MachineInstr &MI, MachineRegisterInfo &MRI,
51 bool legalizeBitfieldExtract(MachineInstr &MI, MachineRegisterInfo &MRI,
53 bool legalizeRotate(MachineInstr &MI, MachineRegisterInfo &MRI,
55 bool legalizeCTPOP(MachineInstr &MI, MachineRegisterInfo &MRI,
57 bool legalizeAtomicCmpxchg128(MachineInstr &MI, MachineRegisterInfo &MRI,
H A DAArch64PostLegalizerLowering.cpp222 static bool matchREV(MachineInstr &MI, MachineRegisterInfo &MRI, in matchREV()
251 static bool matchTRN(MachineInstr &MI, MachineRegisterInfo &MRI, in matchTRN()
272 static bool matchUZP(MachineInstr &MI, MachineRegisterInfo &MRI, in matchUZP()
288 static bool matchZip(MachineInstr &MI, MachineRegisterInfo &MRI, in matchZip()
306 MachineRegisterInfo &MRI, in matchDupFromInsertVectorElt()
345 MachineRegisterInfo &MRI, in matchDupFromBuildVector()
360 static bool matchDup(MachineInstr &MI, MachineRegisterInfo &MRI, in matchDup()
406 static bool matchEXT(MachineInstr &MI, MachineRegisterInfo &MRI, in matchEXT()
471 static bool matchINS(MachineInstr &MI, MachineRegisterInfo &MRI, in matchINS()
498 static bool applyINS(MachineInstr &MI, MachineRegisterInfo &MRI, in applyINS()
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H A DAArch64PostLegalizerCombiner.cpp54 MachineInstr &MI, MachineRegisterInfo &MRI, in matchExtractVecEltPairwiseAdd()
97 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyExtractVecEltPairwiseAdd()
113 static bool isSignExtended(Register R, MachineRegisterInfo &MRI) { in isSignExtended()
119 static bool isZeroExtended(Register R, MachineRegisterInfo &MRI) { in isZeroExtended()
125 MachineInstr &MI, MachineRegisterInfo &MRI, in matchAArch64MulConstCombine()
238 MachineInstr &MI, MachineRegisterInfo &MRI, MachineIRBuilder &B, in applyAArch64MulConstCombine()
248 bool matchFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchFoldMergeToZext()
256 void applyFoldMergeToZext(MachineInstr &MI, MachineRegisterInfo &MRI, in applyFoldMergeToZext()
269 static bool matchMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI) { in matchMutateAnyExtToZExt()
286 static void applyMutateAnyExtToZExt(MachineInstr &MI, MachineRegisterInfo &MRI, in applyMutateAnyExtToZExt()
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H A DAArch64GlobalISelUtils.h35 getAArch64VectorSplat(const MachineInstr &MI, const MachineRegisterInfo &MRI);
41 const MachineRegisterInfo &MRI);
46 const MachineRegisterInfo &MRI);
/openbsd-src/gnu/llvm/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp43 Register llvm::constrainRegToClass(MachineRegisterInfo &MRI, in constrainRegToClass()
55 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
107 MachineRegisterInfo &MRI, const TargetInstrInfo &TII, in constrainOperandRegClass()
160 MachineRegisterInfo &MRI = MF.getRegInfo(); in constrainSelectedInstRegOperands()
199 MachineRegisterInfo &MRI) { in canReplaceReg()
213 const MachineRegisterInfo &MRI) { in isTriviallyDead()
289 const MachineRegisterInfo &MRI) { in getIConstantVRegVal()
300 llvm::getIConstantVRegSExtVal(Register VReg, const MachineRegisterInfo &MRI) { in getIConstantVRegSExtVal()
313 Register VReg, const MachineRegisterInfo &MRI, IsOpcodeFn IsConstantOpcode, in getConstantVRegValWithLookThrough()
410 Register VReg, const MachineRegisterInfo &MRI, bool LookThroughInstrs) { in getIConstantVRegValWithLookThrough()
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/openbsd-src/gnu/llvm/llvm/lib/Target/Hexagon/
H A DHexagonFrameLowering.h28 class MachineRegisterInfo; variable
133 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
136 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
139 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
142 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
145 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
148 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
151 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
154 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
157 MachineRegisterInfo &MRI, const HexagonInstrInfo &HII,
H A DRDFDeadCode.h31 class MachineRegisterInfo; variable
35 DeadCodeElimination(DataFlowGraph &dfg, MachineRegisterInfo &mri) in DeadCodeElimination()
53 MachineRegisterInfo &MRI;
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/
H A DPPCVSXCopy.cpp52 MachineRegisterInfo &MRI) { in IsRegInClass()
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSReg()
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVRReg()
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) { in IsF8Reg()
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSFReg()
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) { in IsVSSReg()
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo(); in processBlock()
/openbsd-src/gnu/llvm/llvm/lib/Target/BPF/
H A DBPFMISimplifyPatchable.cpp64 void processCandidate(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
67 void processDstReg(MachineRegisterInfo *MRI, Register &DstReg,
70 void processInst(MachineRegisterInfo *MRI, MachineInstr *Inst,
72 void checkADDrr(MachineRegisterInfo *MRI, MachineOperand *RelocOp,
74 void checkShift(MachineRegisterInfo *MRI, MachineBasicBlock &MBB,
102 void BPFMISimplifyPatchable::checkADDrr(MachineRegisterInfo *MRI, in checkADDrr()
154 void BPFMISimplifyPatchable::checkShift(MachineRegisterInfo *MRI, in checkShift()
168 void BPFMISimplifyPatchable::processCandidate(MachineRegisterInfo *MRI, in processCandidate()
203 void BPFMISimplifyPatchable::processDstReg(MachineRegisterInfo *MRI, in processDstReg()
240 void BPFMISimplifyPatchable::processInst(MachineRegisterInfo *MRI, in processInst()
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/openbsd-src/gnu/llvm/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp77 bool selectLoadStoreOp(MachineInstr &I, MachineRegisterInfo &MRI,
79 bool selectFrameIndexOrGep(MachineInstr &I, MachineRegisterInfo &MRI,
81 bool selectGlobalValue(MachineInstr &I, MachineRegisterInfo &MRI,
83 bool selectConstant(MachineInstr &I, MachineRegisterInfo &MRI,
85 bool selectTruncOrPtrToInt(MachineInstr &I, MachineRegisterInfo &MRI,
87 bool selectZext(MachineInstr &I, MachineRegisterInfo &MRI,
89 bool selectAnyext(MachineInstr &I, MachineRegisterInfo &MRI,
91 bool selectCmp(MachineInstr &I, MachineRegisterInfo &MRI,
93 bool selectFCmp(MachineInstr &I, MachineRegisterInfo &MRI,
95 bool selectUadde(MachineInstr &I, MachineRegisterInfo &MRI,
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H A DX86DomainReassignment.cpp104 MachineRegisterInfo *MRI) const = 0;
108 MachineRegisterInfo *MRI) const = 0;
119 MachineRegisterInfo *MRI) const override { in convertInstr()
125 MachineRegisterInfo *MRI) const override { in getExtraCost()
153 MachineRegisterInfo *MRI) const override { in convertInstr()
165 MachineRegisterInfo *MRI) const override { in getExtraCost()
181 MachineRegisterInfo *MRI) const override { in convertInstr()
201 MachineRegisterInfo *MRI) const override { in getExtraCost()
236 MachineRegisterInfo *MRI) const override { in getExtraCost()
267 MachineRegisterInfo *MRI) const override { in convertInstr()
[all …]
/openbsd-src/gnu/llvm/llvm/lib/Target/AArch64/
H A DAArch64AdvSIMDScalarPass.cpp66 MachineRegisterInfo *MRI;
105 const MachineRegisterInfo *MRI) { in isGPR64()
114 const MachineRegisterInfo *MRI) { in isFPR64()
128 const MachineRegisterInfo *MRI, in getSrcFromCopy()
209 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
222 MachineRegisterInfo::def_instr_iterator Def = in isProfitableToTransform()
241 for (MachineRegisterInfo::use_instr_nodbg_iterator in isProfitableToTransform()
302 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
321 MachineRegisterInfo::def_instr_iterator Def = in transformInstruction()
/openbsd-src/gnu/llvm/llvm/include/llvm/CodeGen/
H A DRegisterBankInfo.h31 class MachineRegisterInfo; variable
289 MachineRegisterInfo &MRI;
323 MachineRegisterInfo &MRI);
334 MachineRegisterInfo &getMRI() const { return MRI; } in getMRI()
547 const MachineRegisterInfo &MRI) const;
584 const RegisterBank *getRegBank(Register Reg, const MachineRegisterInfo &MRI,
647 MachineRegisterInfo &MRI);
731 unsigned getSizeInBits(Register Reg, const MachineRegisterInfo &MRI,
/openbsd-src/gnu/llvm/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBankInfo.h80 bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI,
85 bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
89 bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI,
/openbsd-src/gnu/llvm/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.h49 MachineRegisterInfo &MRI) in M68kIncomingValueHandler()
67 FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) in FormalArgHandler()
72 CallReturnHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI, in CallReturnHandler()

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