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Searched refs:vmw_read (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/vmwgfx/
H A Dvmwgfx_drv.c546 width = vmw_read(dev_priv, SVGA_REG_WIDTH); in vmw_get_initial_size()
547 height = vmw_read(dev_priv, SVGA_REG_HEIGHT); in vmw_get_initial_size()
688 svga_id = vmw_read(dev_priv, SVGA_REG_ID); in vmw_driver_load()
695 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES); in vmw_driver_load()
698 dev_priv->capabilities2 = vmw_read(dev_priv, SVGA_REG_CAP2); in vmw_driver_load()
708 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE); in vmw_driver_load()
709 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE); in vmw_driver_load()
710 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH); in vmw_driver_load()
711 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT); in vmw_driver_load()
717 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS); in vmw_driver_load()
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H A Dvmwgfx_fifo.c63 result = vmw_read(dev_priv, SVGA_REG_DEV_CAP); in vmw_fifo_have_3d()
129 DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH)); in vmw_fifo_init()
130 DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT)); in vmw_fifo_init()
131 DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL)); in vmw_fifo_init()
133 dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE); in vmw_fifo_init()
134 dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE); in vmw_fifo_init()
135 dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES); in vmw_fifo_init()
143 min = vmw_read(dev_priv, SVGA_REG_MEM_REGS); in vmw_fifo_init()
190 while (vmw_read(dev_priv, SVGA_REG_BUSY) != 0) in vmw_fifo_release()
H A Dvmwgfx_kms.c1896 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) { in vmw_kms_write_svga()
1898 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH)); in vmw_kms_write_svga()
1910 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH); in vmw_kms_save_vga()
1911 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT); in vmw_kms_save_vga()
1912 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL); in vmw_kms_save_vga()
1915 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK); in vmw_kms_save_vga()
1923 vmw_priv->num_displays = vmw_read(vmw_priv, in vmw_kms_save_vga()
1932 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY); in vmw_kms_save_vga()
1933 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X); in vmw_kms_save_vga()
1934 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y); in vmw_kms_save_vga()
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H A Dvmwgfx_ioctl.c173 (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP)); in vmw_fill_compat_cap()
229 (i, vmw_read(dev_priv, SVGA_REG_DEV_CAP)); in vmw_get_cap_3d_ioctl()
H A Dvmwgfx_irq.c159 return (vmw_read(dev_priv, SVGA_REG_BUSY) == 0); in vmw_fifo_idle()
H A Dvmwgfx_drv.h684 static inline uint32_t vmw_read(struct vmw_private *dev_priv, in vmw_read() function