| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/ |
| H A D | amdgpu_dcn_calcs.c | 338 input->src.viewport_width = pipe->plane_res.scl_data.viewport.width; in pipe_ctx_to_e2e_pipe_params()
366 input->src.viewport_width_c = input->src.viewport_width / 2; in pipe_ctx_to_e2e_pipe_params()
372 input->src.viewport_width_c = input->src.viewport_width / 2; in pipe_ctx_to_e2e_pipe_params()
379 input->src.viewport_width_c = input->src.viewport_width; in pipe_ctx_to_e2e_pipe_params()
384 input->src.viewport_width_c = input->src.viewport_width; in pipe_ctx_to_e2e_pipe_params()
894 v->viewport_width[input_idx] = pipe->stream->timing.h_addressable; in dcn_validate_bandwidth()
903 if (v->viewport_width[input_idx] > 1920) in dcn_validate_bandwidth()
904 v->viewport_width[input_idx] = 1920; in dcn_validate_bandwidth()
907 v->scaler_rec_out_width[input_idx] = v->viewport_width[input_idx]; in dcn_validate_bandwidth()
917 v->viewport_width[input_idx] = pipe->plane_res.scl_data.viewport.width; in dcn_validate_bandwidth()
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| H A D | amdgpu_dcn_calc_auto.c | 51 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation()
56 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation()
61 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation()
64 … =dcn_bw_max2(v->viewport_height[k] / v->scaler_rec_out_width[k], v->viewport_width[k] / v->scaler… in scaler_settings_calculation()
153 v->swath_width_ysingle_dpp[k] = v->viewport_width[k]; in mode_support_and_system_configuration()
626 …v->meta_surface_width_y =dcn_bw_ceil2(v->viewport_width[k] / v->no_of_dpp[i][j][k] - 1.0, v->meta_… in mode_support_and_system_configuration()
670 …viewport_width[k] / v->no_of_dpp[i][j][k] *dcn_bw_min2(128.0, dcn_bw_pow(2.0,dcn_bw_floor2(dcn_bw_… in mode_support_and_system_configuration()
673 …v->dpte_bytes_per_row_y = 64.0 * (dcn_bw_ceil2((v->viewport_width[k] / v->no_of_dpp[i][j][k] - 1.0… in mode_support_and_system_configuration()
686 …v->meta_surface_width_c =dcn_bw_ceil2(v->viewport_width[k] / v->no_of_dpp[i][j][k] / 2.0 - 1.0, v-… in mode_support_and_system_configuration()
731 …viewport_width[k] / v->no_of_dpp[i][j][k] / 2.0 * dcn_bw_min2(128.0, dcn_bw_pow(2.0,dcn_bw_floor2(… in mode_support_and_system_configuration()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/ |
| H A D | amdgpu_display_mode_vba.c | 392 src->viewport_width; in fetch_pipe_params()
405 mode_lib->vba.SurfaceWidthY[mode_lib->vba.NumberOfActivePlanes] = src->viewport_width; in fetch_pipe_params()
607 src_k->viewport_width; in fetch_pipe_params()
609 src_k->viewport_width; in fetch_pipe_params()
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| H A D | display_mode_structs.h | 236 unsigned int viewport_width; member
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| H A D | amdgpu_dml1_display_rq_dlg_calc.c | 617 vp_width = pipe_src_param.viewport_width / ppe; in get_surf_rq_param()
1199 vp_width_l = e2e_pipe_param.pipe.src.viewport_width; in dml1_rq_dlg_get_dlg_params()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/ |
| H A D | amdgpu_dcn10_hw_sequencer_debug.c | 152 s->viewport_width, in dcn10_get_hubp_states()
172 s->viewport_width, in dcn10_get_hubp_states()
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| H A D | amdgpu_dcn10_hw_sequencer.c | 178 s->viewport_width, in dcn10_log_hubp_states()
3021 int viewport_width = in dcn10_set_cursor_position() local
3027 if (pos_cpy.x >= viewport_width + viewport_x) { in dcn10_set_cursor_position()
3028 pos_cpy.x = 2 * viewport_width in dcn10_set_cursor_position()
3038 pos_cpy.x = temp_x + viewport_width; in dcn10_set_cursor_position()
3042 pos_cpy.x = viewport_width - pos_cpy.x + 2 * viewport_x; in dcn10_set_cursor_position()
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| H A D | dcn10_hubp.h | 668 uint32_t viewport_width; member
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| H A D | amdgpu_dcn10_hubp.c | 1002 PRI_VIEWPORT_WIDTH, &s->viewport_width, in hubp1_read_state_common()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | amdgpu_dcn20_resource.c | 2073 pipes[pipe_cnt].pipe.src.viewport_width = timing->h_addressable; in dcn20_populate_dml_pipes_from_context()
2074 if (pipes[pipe_cnt].pipe.src.viewport_width > 1920) in dcn20_populate_dml_pipes_from_context()
2075 pipes[pipe_cnt].pipe.src.viewport_width = 1920; in dcn20_populate_dml_pipes_from_context()
2080 pipes[pipe_cnt].pipe.src.surface_width_y = pipes[pipe_cnt].pipe.src.viewport_width; in dcn20_populate_dml_pipes_from_context()
2082 pipes[pipe_cnt].pipe.src.surface_width_c = pipes[pipe_cnt].pipe.src.viewport_width; in dcn20_populate_dml_pipes_from_context()
2083 …pipes[pipe_cnt].pipe.src.data_pitch = ((pipes[pipe_cnt].pipe.src.viewport_width + 63) / 64) * 64; … in dcn20_populate_dml_pipes_from_context()
2085 …pipes[pipe_cnt].pipe.dest.recout_width = pipes[pipe_cnt].pipe.src.viewport_width; /*vp_width/hrati… in dcn20_populate_dml_pipes_from_context()
2112 pipes[pipe_cnt].pipe.src.viewport_width = scl->viewport.width; in dcn20_populate_dml_pipes_from_context()
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| H A D | amdgpu_dcn20_hubp.c | 1194 PRI_VIEWPORT_WIDTH, &s->viewport_width, in hubp2_read_state_common()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| H A D | dcn_calcs.h | 177 float viewport_width[number_of_planes_minus_one + 1]; member
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn20/ |
| H A D | amdgpu_display_rq_dlg_calc_20v2.c | 692 vp_width = pipe_src_param.viewport_width / ppe; in get_surf_rq_param()
972 vp_width_l = src->viewport_width; in dml20v2_rq_dlg_get_dlg_params()
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| H A D | amdgpu_display_rq_dlg_calc_20.c | 692 vp_width = pipe_src_param.viewport_width / ppe; in get_surf_rq_param()
971 vp_width_l = src->viewport_width; in dml20_rq_dlg_get_dlg_params()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dml/dcn21/ |
| H A D | amdgpu_display_rq_dlg_calc_21.c | 701 vp_width = pipe_param.src.viewport_width / ppe; in get_surf_rq_param()
1023 vp_width_l = src->viewport_width; in dml_rq_dlg_get_dlg_params()
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