Searched refs:v16s8 (Results 1 – 3 of 3) sorted by relevance
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86LegalizerInfo.cpp | 314 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoSSE2() local 329 for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) in setLegalizerInfoSSE2() 345 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { in setLegalizerInfoSSE2() 349 for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoSSE2() 368 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoAVX() local 390 for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoAVX() 401 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { in setLegalizerInfoAVX() 443 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoAVX512() local 472 for (auto Ty : {v32s8, v16s16, v8s32, v4s64, v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoAVX512()
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64LegalizerInfo.cpp | 50 const LLT v16s8 = LLT::vector(16, 8); in AArch64LegalizerInfo() local 62 v16s8, v8s16, v4s32, in AArch64LegalizerInfo() 110 .legalFor({s32, s64, v2s32, v4s32, v4s16, v8s16, v16s8, v8s8}) in AArch64LegalizerInfo() 135 {v16s8, v16s8}, in AArch64LegalizerInfo() 287 {v16s8, p0, 128, 8}, in AArch64LegalizerInfo() 323 {v16s8, p0, 128, 8}, in AArch64LegalizerInfo() 368 {v16s8, v16s8}}) in AArch64LegalizerInfo() 493 .legalForCartesianProduct({s1, s8, s16, s32, s64, s128, v16s8, v8s8, v4s8, in AArch64LegalizerInfo() 611 VecTy == v16s8 || VecTy == v2s32 || VecTy == v2p0; in AArch64LegalizerInfo() 642 {v16s8, s8}, in AArch64LegalizerInfo() [all …]
|
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsLegalizerInfo.cpp | 72 const LLT v16s8 = LLT::vector(16, 8); in MipsLegalizerInfo() local 82 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo() 112 Query, {{v16s8, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo() 197 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo() 280 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
|