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Searched refs:slice_width (Results 1 – 12 of 12) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dsc/
H A Damdgpu_rc_calc_dpi.c42 to->slice_width = from->slice_width; in copy_pps_fields()
115 int slice_width = pps->slice_width; in dscc_compute_dsc_parameters() local
121 double d_bytes_per_pixel = dsc_ceil(bpp * slice_width / 8.0) / slice_width; in dscc_compute_dsc_parameters()
135 calc_rc_params(&rc, mode, bpc, bpp, slice_width, slice_height, pps->dsc_version_minor); in dscc_compute_dsc_parameters()
H A Damdgpu_rc_calc.c180 …arams *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, int slice_width, int slice_heig… in calc_rc_params() argument
215 slice_width /= 2; in calc_rc_params()
217 …padding_pixels = ((slice_width % 3) != 0) ? (3 - (slice_width % 3)) * (rc->initial_xmit_delay / sl… in calc_rc_params()
H A Drc_calc.h82 …arams *rc, enum colour_mode cm, enum bits_per_comp bpc, float bpp, int slice_width, int slice_heig…
H A Damdgpu_dc_dsc.c573 int slice_width; in setup_dsc_config() local
733 slice_width = pic_width / num_slices_h; in setup_dsc_config()
735 is_dsc_possible = slice_width <= dsc_common_caps.max_slice_width; in setup_dsc_config()
/netbsd-src/sys/external/bsd/drm2/dist/drm/
H A Ddrm_dsc.c128 pps_payload->slice_width = cpu_to_be16(dsc_cfg->slice_width); in drm_dsc_pps_payload_pack()
274 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width / 2, in drm_dsc_compute_rc_parameters()
278 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width / 2 * in drm_dsc_compute_rc_parameters()
283 groups_per_line = DIV_ROUND_UP(vdsc_cfg->slice_width, in drm_dsc_compute_rc_parameters()
287 vdsc_cfg->slice_chunk_size = DIV_ROUND_UP(vdsc_cfg->slice_width * in drm_dsc_compute_rc_parameters()
/netbsd-src/sys/external/bsd/drm2/dist/include/drm/
H A Ddrm_dsc.h100 u16 slice_width; member
359 __be16 slice_width; member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
H A Damdgpu_dcn20_dsc.c296 DC_LOG_DSC("\tslice_width %d", pps->slice_width); in dsc_log_pps()
380 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
408 dsc_optc_cfg->slice_width = dsc_reg_vals->pps.slice_width; in dsc_prepare_config()
502 reg_vals->pps.slice_width = 0; in dsc_init_reg_values()
605 SLICE_WIDTH, reg_vals->pps.slice_width, in dsc_write_to_registers()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/
H A Ddsc.h50 uint32_t slice_width; /* Slice width in pixels */ member
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/core/
H A Damdgpu_dc_link_hwss.c397 DC_LOG_DSC("\tslice_width %d", config->slice_width); in dsc_optc_config_log()
461 dsc_optc_cfg.slice_width); in dp_set_dsc_on_stream()
472 dsc_optc_cfg.slice_width); in dp_set_dsc_on_stream()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/
H A Dintel_vdsc.c397 vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width, in intel_dsc_compute_params()
584 DSC_SLICE_WIDTH(vdsc_cfg->slice_width); in intel_dsc_pps_configure()
749 vdsc_cfg->slice_width) | in intel_dsc_pps_configure()
H A Dicl_dsi.c1367 WARN_ON(vdsc_cfg->pic_width % vdsc_cfg->slice_width); in gen11_dsi_dsc_compute_config()
/netbsd-src/sys/external/bsd/drm2/dist/drm/i915/
H A Di915_reg.h11813 #define DSC_SLICE_WIDTH(slice_width) ((slice_width) << 16) argument