Searched refs:should_set_clock (Results 1 – 9 of 9) sorted by relevance
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/ |
| H A D | amdgpu_dcn20_clk_mgr.c | 191 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in dcn2_update_clocks()
202 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn2_update_clocks()
208 if (should_set_clock(safe_to_lower, in dcn2_update_clocks()
215 if (should_set_clock(safe_to_lower, new_clocks->socclk_khz, clk_mgr_base->clks.socclk_khz)) { in dcn2_update_clocks()
228 if (should_set_clock(safe_to_lower, new_clocks->dramclk_khz, clk_mgr_base->clks.dramclk_khz)) { in dcn2_update_clocks()
234 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in dcn2_update_clocks()
245 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in dcn2_update_clocks()
286 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr->clks.phyclk_khz)) { in dcn2_update_clocks_fpga()
290 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn2_update_clocks_fpga()
294 if (should_set_clock(safe_to_lower, in dcn2_update_clocks_fpga()
[all …]
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/ |
| H A D | amdgpu_rv1_clk_mgr.c | 173 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rv1_update_clocks()
182 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in rv1_update_clocks()
188 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
193 if (should_set_clock(safe_to_lower, in rv1_update_clocks()
215 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz) in rv1_update_clocks()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce120/ |
| H A D | amdgpu_dce120_clk_mgr.c | 102 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce12_update_clocks()
117 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { in dce12_update_clocks()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn21/ |
| H A D | amdgpu_rn_clk_mgr.c | 143 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rn_update_clocks()
148 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
153 if (should_set_clock(safe_to_lower, in rn_update_clocks()
165 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in rn_update_clocks()
172 if (should_set_clock(safe_to_lower, new_clocks->dispclk_khz, clk_mgr_base->clks.dispclk_khz)) { in rn_update_clocks()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/ |
| H A D | dce_clk_mgr.c | 693 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce_update_clocks()
720 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce11_update_clocks()
747 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce112_update_clocks()
767 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr->clks.dispclk_khz)) { in dce12_update_clocks()
782 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr->clks.phyclk_khz)) { in dce12_update_clocks()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr_internal.h | 280 static inline bool should_set_clock(bool safe_to_lower, int calc_clk, int cur_clk) in should_set_clock() function
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce112/ |
| H A D | amdgpu_dce112_clk_mgr.c | 218 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce112_update_clocks()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | amdgpu_dce110_clk_mgr.c | 273 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce11_update_clocks()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dce100/ |
| H A D | amdgpu_dce_clk_mgr.c | 420 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce_update_clocks()
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