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Searched refs:setTargetDAGCombine (Results 1 – 20 of 20) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp797 setTargetDAGCombine(ISD::ADD); in SITargetLowering()
798 setTargetDAGCombine(ISD::ADDCARRY); in SITargetLowering()
799 setTargetDAGCombine(ISD::SUB); in SITargetLowering()
800 setTargetDAGCombine(ISD::SUBCARRY); in SITargetLowering()
801 setTargetDAGCombine(ISD::FADD); in SITargetLowering()
802 setTargetDAGCombine(ISD::FSUB); in SITargetLowering()
803 setTargetDAGCombine(ISD::FMINNUM); in SITargetLowering()
804 setTargetDAGCombine(ISD::FMAXNUM); in SITargetLowering()
805 setTargetDAGCombine(ISD::FMINNUM_IEEE); in SITargetLowering()
806 setTargetDAGCombine(ISD::FMAXNUM_IEEE); in SITargetLowering()
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H A DAMDGPUISelLowering.cpp548 setTargetDAGCombine(ISD::BITCAST); in AMDGPUTargetLowering()
549 setTargetDAGCombine(ISD::SHL); in AMDGPUTargetLowering()
550 setTargetDAGCombine(ISD::SRA); in AMDGPUTargetLowering()
551 setTargetDAGCombine(ISD::SRL); in AMDGPUTargetLowering()
552 setTargetDAGCombine(ISD::TRUNCATE); in AMDGPUTargetLowering()
553 setTargetDAGCombine(ISD::MUL); in AMDGPUTargetLowering()
554 setTargetDAGCombine(ISD::MULHU); in AMDGPUTargetLowering()
555 setTargetDAGCombine(ISD::MULHS); in AMDGPUTargetLowering()
556 setTargetDAGCombine(ISD::SELECT); in AMDGPUTargetLowering()
557 setTargetDAGCombine(ISD::SELECT_CC); in AMDGPUTargetLowering()
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H A DR600ISelLowering.cpp249 setTargetDAGCombine(ISD::FP_ROUND); in R600TargetLowering()
250 setTargetDAGCombine(ISD::FP_TO_SINT); in R600TargetLowering()
251 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in R600TargetLowering()
252 setTargetDAGCombine(ISD::SELECT_CC); in R600TargetLowering()
253 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in R600TargetLowering()
254 setTargetDAGCombine(ISD::LOAD); in R600TargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp141 setTargetDAGCombine(ISD::ADD); in LanaiTargetLowering()
142 setTargetDAGCombine(ISD::SUB); in LanaiTargetLowering()
143 setTargetDAGCombine(ISD::AND); in LanaiTargetLowering()
144 setTargetDAGCombine(ISD::OR); in LanaiTargetLowering()
145 setTargetDAGCombine(ISD::XOR); in LanaiTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp146 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in WebAssemblyTargetLowering()
149 setTargetDAGCombine(ISD::SIGN_EXTEND); in WebAssemblyTargetLowering()
150 setTargetDAGCombine(ISD::ZERO_EXTEND); in WebAssemblyTargetLowering()
153 setTargetDAGCombine(ISD::SINT_TO_FP); in WebAssemblyTargetLowering()
154 setTargetDAGCombine(ISD::UINT_TO_FP); in WebAssemblyTargetLowering()
155 setTargetDAGCombine(ISD::EXTRACT_SUBVECTOR); in WebAssemblyTargetLowering()
158 setTargetDAGCombine(ISD::CONCAT_VECTORS); in WebAssemblyTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.cpp102 setTargetDAGCombine(ISD::SHL); in MipsSETargetLowering()
103 setTargetDAGCombine(ISD::SRA); in MipsSETargetLowering()
104 setTargetDAGCombine(ISD::SRL); in MipsSETargetLowering()
105 setTargetDAGCombine(ISD::SETCC); in MipsSETargetLowering()
106 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering()
164 setTargetDAGCombine(ISD::AND); in MipsSETargetLowering()
165 setTargetDAGCombine(ISD::OR); in MipsSETargetLowering()
166 setTargetDAGCombine(ISD::SRA); in MipsSETargetLowering()
167 setTargetDAGCombine(ISD::VSELECT); in MipsSETargetLowering()
168 setTargetDAGCombine(ISD::XOR); in MipsSETargetLowering()
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H A DMipsISelLowering.cpp497 setTargetDAGCombine(ISD::SDIVREM); in MipsTargetLowering()
498 setTargetDAGCombine(ISD::UDIVREM); in MipsTargetLowering()
499 setTargetDAGCombine(ISD::SELECT); in MipsTargetLowering()
500 setTargetDAGCombine(ISD::AND); in MipsTargetLowering()
501 setTargetDAGCombine(ISD::OR); in MipsTargetLowering()
502 setTargetDAGCombine(ISD::ADD); in MipsTargetLowering()
503 setTargetDAGCombine(ISD::SUB); in MipsTargetLowering()
504 setTargetDAGCombine(ISD::AssertZext); in MipsTargetLowering()
505 setTargetDAGCombine(ISD::SHL); in MipsTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp640 setTargetDAGCombine(ISD::ZERO_EXTEND); in SystemZTargetLowering()
641 setTargetDAGCombine(ISD::SIGN_EXTEND); in SystemZTargetLowering()
642 setTargetDAGCombine(ISD::SIGN_EXTEND_INREG); in SystemZTargetLowering()
643 setTargetDAGCombine(ISD::LOAD); in SystemZTargetLowering()
644 setTargetDAGCombine(ISD::STORE); in SystemZTargetLowering()
645 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in SystemZTargetLowering()
646 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in SystemZTargetLowering()
647 setTargetDAGCombine(ISD::FP_ROUND); in SystemZTargetLowering()
648 setTargetDAGCombine(ISD::STRICT_FP_ROUND); in SystemZTargetLowering()
649 setTargetDAGCombine(ISD::FP_EXTEND); in SystemZTargetLowering()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp502 setTargetDAGCombine(ISD::ADD); in NVPTXTargetLowering()
503 setTargetDAGCombine(ISD::AND); in NVPTXTargetLowering()
504 setTargetDAGCombine(ISD::FADD); in NVPTXTargetLowering()
505 setTargetDAGCombine(ISD::MUL); in NVPTXTargetLowering()
506 setTargetDAGCombine(ISD::SHL); in NVPTXTargetLowering()
507 setTargetDAGCombine(ISD::SREM); in NVPTXTargetLowering()
508 setTargetDAGCombine(ISD::UREM); in NVPTXTargetLowering()
513 setTargetDAGCombine(ISD::SETCC); in NVPTXTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp791 setTargetDAGCombine(ISD::BRCOND); in ARMTargetLowering()
792 setTargetDAGCombine(ISD::BR_CC); in ARMTargetLowering()
959 setTargetDAGCombine(ISD::SHL); in ARMTargetLowering()
960 setTargetDAGCombine(ISD::SRL); in ARMTargetLowering()
961 setTargetDAGCombine(ISD::SRA); in ARMTargetLowering()
962 setTargetDAGCombine(ISD::FP_TO_SINT); in ARMTargetLowering()
963 setTargetDAGCombine(ISD::FP_TO_UINT); in ARMTargetLowering()
964 setTargetDAGCombine(ISD::FDIV); in ARMTargetLowering()
965 setTargetDAGCombine(ISD::LOAD); in ARMTargetLowering()
979 setTargetDAGCombine(ISD::BUILD_VECTOR); in ARMTargetLowering()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp870 setTargetDAGCombine(ISD::OR); in AArch64TargetLowering()
872 setTargetDAGCombine(ISD::AND); in AArch64TargetLowering()
876 setTargetDAGCombine(ISD::ADD); in AArch64TargetLowering()
877 setTargetDAGCombine(ISD::ABS); in AArch64TargetLowering()
878 setTargetDAGCombine(ISD::SUB); in AArch64TargetLowering()
879 setTargetDAGCombine(ISD::SRL); in AArch64TargetLowering()
880 setTargetDAGCombine(ISD::XOR); in AArch64TargetLowering()
881 setTargetDAGCombine(ISD::SINT_TO_FP); in AArch64TargetLowering()
882 setTargetDAGCombine(ISD::UINT_TO_FP); in AArch64TargetLowering()
885 setTargetDAGCombine(ISD::FP_TO_SINT); in AArch64TargetLowering()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp170 setTargetDAGCombine(ISD::STORE); in XCoreTargetLowering()
171 setTargetDAGCombine(ISD::ADD); in XCoreTargetLowering()
172 setTargetDAGCombine(ISD::INTRINSIC_VOID); in XCoreTargetLowering()
173 setTargetDAGCombine(ISD::INTRINSIC_W_CHAIN); in XCoreTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp1303 setTargetDAGCombine(ISD::ADD); in PPCTargetLowering()
1304 setTargetDAGCombine(ISD::SHL); in PPCTargetLowering()
1305 setTargetDAGCombine(ISD::SRA); in PPCTargetLowering()
1306 setTargetDAGCombine(ISD::SRL); in PPCTargetLowering()
1307 setTargetDAGCombine(ISD::MUL); in PPCTargetLowering()
1308 setTargetDAGCombine(ISD::FMA); in PPCTargetLowering()
1309 setTargetDAGCombine(ISD::SINT_TO_FP); in PPCTargetLowering()
1310 setTargetDAGCombine(ISD::BUILD_VECTOR); in PPCTargetLowering()
1312 setTargetDAGCombine(ISD::UINT_TO_FP); in PPCTargetLowering()
1313 setTargetDAGCombine(ISD::LOAD); in PPCTargetLowering()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp2005 setTargetDAGCombine(ISD::VECTOR_SHUFFLE); in X86TargetLowering()
2006 setTargetDAGCombine(ISD::SCALAR_TO_VECTOR); in X86TargetLowering()
2007 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in X86TargetLowering()
2008 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in X86TargetLowering()
2009 setTargetDAGCombine(ISD::CONCAT_VECTORS); in X86TargetLowering()
2010 setTargetDAGCombine(ISD::INSERT_SUBVECTOR); in X86TargetLowering()
2011 setTargetDAGCombine(ISD::EXTRACT_SUBVECTOR); in X86TargetLowering()
2012 setTargetDAGCombine(ISD::BITCAST); in X86TargetLowering()
2013 setTargetDAGCombine(ISD::VSELECT); in X86TargetLowering()
2014 setTargetDAGCombine(ISD::SELECT); in X86TargetLowering()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp813 setTargetDAGCombine(ISD::AND); in RISCVTargetLowering()
814 setTargetDAGCombine(ISD::OR); in RISCVTargetLowering()
815 setTargetDAGCombine(ISD::XOR); in RISCVTargetLowering()
817 setTargetDAGCombine(ISD::FCOPYSIGN); in RISCVTargetLowering()
818 setTargetDAGCombine(ISD::MGATHER); in RISCVTargetLowering()
819 setTargetDAGCombine(ISD::MSCATTER); in RISCVTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonISelLoweringHVX.cpp269 setTargetDAGCombine(ISD::SPLAT_VECTOR); in initializeHVXLowering()
270 setTargetDAGCombine(ISD::VSELECT); in initializeHVXLowering()
H A DHexagonISelLowering.cpp1803 setTargetDAGCombine(ISD::VSELECT); in HexagonTargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetLowering.h2262 void setTargetDAGCombine(ISD::NodeType NT) { in setTargetDAGCombine() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVEISelLowering.cpp868 setTargetDAGCombine(ISD::TRUNCATE); in VETargetLowering()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1810 setTargetDAGCombine(ISD::BITCAST); in SparcTargetLowering()