| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUPALMetadata.cpp | 63 setRegister(Key->getZExtValue(), Val->getZExtValue()); in readFromIR()
81 setRegister(Data[I * 2], Data[I * 2 + 1]); in setFromLegacyBlob()
139 setRegister(getRsrc1Reg(CC), Val); in setRsrc1()
145 setRegister(getRsrc1Reg(CC) + 1, Val); in setRsrc2()
151 setRegister(PALMD::R_A1B3_SPI_PS_INPUT_ENA, Val); in setSpiPsInputEna()
157 setRegister(PALMD::R_A1B4_SPI_PS_INPUT_ADDR, Val); in setSpiPsInputAddr()
174 void AMDGPUPALMetadata::setRegister(unsigned Reg, unsigned Val) { in setRegister() function in AMDGPUPALMetadata
205 setRegister(NumUsedVgprsKey, Val); in setNumUsedVgprs()
221 setRegister(NumUsedSgprsKey, Val); in setNumUsedSgprs()
232 setRegister(getScratchSizeKey(CC), Val); in setScratchSize()
[all …]
|
| H A D | AMDGPUPALMetadata.h | 62 void setRegister(unsigned Reg, unsigned Val);
|
| /netbsd-src/sys/lib/libunwind/ |
| H A D | Registers.hpp | 55 void setRegister(int num, uint32_t value) { in setRegister() function in _Unwind::Registers_x86
121 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_x86_64
228 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_ppc32
332 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_aarch64
421 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_arm32
541 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_vax
620 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_M68K
715 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_SH3
779 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_SPARC64
843 void setRegister(int num, uint64_t value) { in setRegister() function in _Unwind::Registers_SPARC
[all …]
|
| H A D | UnwindCursor.hpp | 46 fRegisters.setRegister(regNum, value); in setReg()
|
| H A D | DwarfInstructions.hpp | 143 newRegisters.setRegister(i, getSavedRegister(addressSpace, registers, cfa, in stepWithDwarf()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64CleanupLocalDynamicTLSPass.cpp | 79 I = setRegister(*I, &TLSBaseAddrReg); in VisitNode()
120 MachineInstr *setRegister(MachineInstr &I, unsigned *TLSBaseAddrReg) { in setRegister() function
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MachineLocation.h | 49 void setRegister(unsigned R) { Register = R; } in setRegister() function
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.h | 126 void setRegister(uint32_t NewRegNum) { RegNum = NewRegNum; } in setRegister() function
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/DebugInfo/DWARF/ |
| H A D | DWARFDebugFrame.cpp | 717 Row.getCFAValue().setRegister(*RegNum); in parseRows()
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 5088 PALMetadata->setRegister(Key, Value); in ParseDirectivePALMetadata()
|