| /netbsd-src/external/lgpl3/gmp/dist/mpn/pa64/ |
| H A D | README | 50 Latency scheduling is not as important as making sure to have a mix of ALU and
52 do some amount of latency scheduling.
54 Like for all other processors, RAW memory scheduling is critically important.
61 cycles/limb on PA8500. With latency scheduling, the numbers could
65 1.6875 cycles/limb on PA8500. With latency scheduling, this could
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| /netbsd-src/external/apache2/llvm/dist/llvm/docs/CommandGuide/ |
| H A D | lli.rst | 138 Disable scheduling after register allocation.
163 =none: No scheduling: breadth first sequencing
164 =simple: Simple two pass scheduling: minimize critical path and maximize processor utilization
165 =simple-noitin: Simple two pass scheduling: Same as simple except using generic latency
166 =list-burr: Bottom-up register reduction list scheduling
167 =list-tdrr: Top-down register reduction list scheduling
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/mips/ |
| H A D | 4130.md | 27 ;; like a standard two-way superscalar architecture. If scheduling were
30 ;; unaligned address. Unfortunately, delayed branch scheduling and
31 ;; hazard avoidance are done after the final scheduling pass, and they
66 ;; This is a fake unit for pre-reload scheduling of multiplications.
70 ;; The scheduling hooks use this attribute for (b) above.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/mips/ |
| H A D | 4130.md | 27 ;; like a standard two-way superscalar architecture. If scheduling were
30 ;; unaligned address. Unfortunately, delayed branch scheduling and
31 ;; hazard avoidance are done after the final scheduling pass, and they
66 ;; This is a fake unit for pre-reload scheduling of multiplications.
70 ;; The scheduling hooks use this attribute for (b) above.
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| /netbsd-src/external/cddl/dtracetoolkit/dist/Docs/Examples/ |
| H A D | priclass_example.txt | 5 this time, other processes in different scheduling classes were
58 of different scheduling classes.
76 The TS time sharing class is the default scheduling class for the processes
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| /netbsd-src/external/cddl/dtracetoolkit/dist/Examples/ |
| H A D | priclass_example.txt | 5 this time, other processes in different scheduling classes were
58 of different scheduling classes.
76 The TS time sharing class is the default scheduling class for the processes
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/sh/ |
| H A D | sh1.md | 1 ;; DFA scheduling description for Renesas / SuperH SH.
26 ;; SH-1 scheduling. This is just a conversion of the old scheduling
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/sh/ |
| H A D | sh1.md | 1 ;; DFA scheduling description for Renesas / SuperH SH.
26 ;; SH-1 scheduling. This is just a conversion of the old scheduling
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/rs6000/ |
| H A D | titan.md | 29 ;; === FXU scheduling ===
83 ;; === BPU scheduling ===
92 ;; === LSU scheduling ===
126 ;; === FPU scheduling ===
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/rs6000/ |
| H A D | titan.md | 29 ;; === FXU scheduling ===
83 ;; === BPU scheduling ===
92 ;; === LSU scheduling ===
126 ;; === FPU scheduling ===
|
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMScheduleM7.td | 26 // pipe. The stages relevant to scheduling are as follows:
35 // for scheduling, so simple ALU operations executing in EX2 will have
138 // Division. Effective scheduling latency is 3, though real latency is larger
145 // Square-root. Effective scheduling latency is 3; real latency is larger
238 // Load/store multiples cannot be dual-issued. Note that default scheduling
353 // single-cycle as far as scheduling opportunities go. By putting WriteALU
408 // Effective scheduling latency is really 3 for nearly all FP operations,
470 // making it appear to have 3 cycle latency for scheduling.
489 // it appear to have 3 cycle latency for scheduling.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/ia64/ |
| H A D | ia64.opt | 22 ; Which cpu are we scheduling for.
110 Enable earlier placing stop bits for better scheduling.
178 Place a stop bit after every cycle when scheduling.
194 Don't generate checks for control speculation in selective scheduling.
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/ia64/ |
| H A D | ia64.opt | 22 ; Which cpu are we scheduling for.
110 Enable earlier placing stop bits for better scheduling.
178 Place a stop bit after every cycle when scheduling.
194 Don't generate checks for control speculation in selective scheduling.
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| /netbsd-src/external/gpl3/gcc/dist/gcc/config/iq2000/ |
| H A D | iq2000.opt | 24 ; The target cpu for optimization and scheduling.
47 Specify CPU for scheduling purposes.
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/iq2000/ |
| H A D | iq2000.opt | 24 ; The target cpu for optimization and scheduling.
47 Specify CPU for scheduling purposes.
|
| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
| H A D | TargetItinerary.td | 9 // This file defines the target-independent scheduling interfaces
11 // itineraries for scheduling. Itineraries are detailed reservation
13 // in-order machine with complicated scheduling or bundling constraints.
22 // during scheduling and has an affect instruction order based on availability
|
| H A D | TargetSchedule.td | 9 // This file defines the target-independent scheduling interfaces which should
10 // be implemented by each target which is using TableGen based scheduling.
91 // that have a scheduling class (itinerary class or SchedRW list)
114 // to skip the checks for scheduling information when building LLVM for
168 // an in-order pipeline within an out-of-order core where scheduling
257 // Allow a processor to mark some scheduling classes as unsupported
260 // Allow a processor to mark some scheduling classes as single-issue.
320 // Allow a processor to mark some scheduling classes as unsupported
357 // Base class for scheduling predicates.
360 // A scheduling predicate whose logic is defined by a MCInstPredicate.
[all …]
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| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/sparc/ |
| H A D | leon5.md | 24 ;; Avoid scheduling load/store, FPU, and multiply instructions back to
29 ;; Avoid scheduling ALU instructions with data dependencies back to back.
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/sparc/ |
| H A D | leon5.md | 24 ;; Avoid scheduling load/store, FPU, and multiply instructions back to
29 ;; Avoid scheduling ALU instructions with data dependencies back to back.
|
| /netbsd-src/external/gpl3/gcc.old/dist/libgcc/config/arm/ |
| H A D | t-strongarm-elf | 4 # or scheduling code that is breaking _fpmul_parts in fp-bit.c.
|
| /netbsd-src/external/gpl3/gcc/dist/libgcc/config/arm/ |
| H A D | t-strongarm-elf | 4 # or scheduling code that is breaking _fpmul_parts in fp-bit.c.
|
| /netbsd-src/external/mit/isl/dist/cpp/ |
| H A D | cpp-checked-conversion.h.top | 6 /// polyhedral compilation, ranging from dependence analysis over scheduling
|
| H A D | typed_cpp.h.top | 5 /// polyhedral compilation, ranging from dependence analysis over scheduling
|
| /netbsd-src/external/gpl3/gcc/dist/gcc/config/pa/ |
| H A D | pa.opt | 24 ; Which cpu we are scheduling for.
119 Specify CPU for scheduling purposes. Valid arguments are 700, 7100, 7100LC, 7200, 7300, and 8000.
|
| /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/pa/ |
| H A D | pa.opt | 24 ; Which cpu we are scheduling for.
119 Specify CPU for scheduling purposes. Valid arguments are 700, 7100, 7100LC, 7200, 7300, and 8000.
|