Searched refs:rv770 (Results 1 – 13 of 13) sorted by relevance
1199 rdev->config.rv770.tiling_group_size = 256; in rv770_gpu_init()1202 rdev->config.rv770.max_pipes = 4; in rv770_gpu_init()1203 rdev->config.rv770.max_tile_pipes = 8; in rv770_gpu_init()1204 rdev->config.rv770.max_simds = 10; in rv770_gpu_init()1205 rdev->config.rv770.max_backends = 4; in rv770_gpu_init()1206 rdev->config.rv770.max_gprs = 256; in rv770_gpu_init()1207 rdev->config.rv770.max_threads = 248; in rv770_gpu_init()1208 rdev->config.rv770.max_stack_entries = 512; in rv770_gpu_init()1209 rdev->config.rv770.max_hw_contexts = 8; in rv770_gpu_init()1210 rdev->config.rv770.max_gs_threads = 16 * 2; in rv770_gpu_init()[all …]
130 u32 spll_func_cntl = pi->clk_regs.rv770.cg_spll_func_cntl; in rv740_populate_sclk_value()131 u32 spll_func_cntl_2 = pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv740_populate_sclk_value()132 u32 spll_func_cntl_3 = pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv740_populate_sclk_value()133 u32 cg_spll_spread_spectrum = pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv740_populate_sclk_value()134 u32 cg_spll_spread_spectrum_2 = pi->clk_regs.rv770.cg_spll_spread_spectrum_2; in rv740_populate_sclk_value()196 u32 mpll_ad_func_cntl = pi->clk_regs.rv770.mpll_ad_func_cntl; in rv740_populate_mclk_value()197 u32 mpll_ad_func_cntl_2 = pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv740_populate_mclk_value()198 u32 mpll_dq_func_cntl = pi->clk_regs.rv770.mpll_dq_func_cntl; in rv740_populate_mclk_value()199 u32 mpll_dq_func_cntl_2 = pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv740_populate_mclk_value()200 u32 mclk_pwrmgt_cntl = pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv740_populate_mclk_value()[all …]
397 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_mclk_value()399 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_mclk_value()401 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_mclk_value()403 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()405 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv770_populate_mclk_value()406 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv770_populate_mclk_value()495 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_sclk_value()497 pi->clk_regs.rv770.cg_spll_func_cntl_2; in rv770_populate_sclk_value()499 pi->clk_regs.rv770.cg_spll_func_cntl_3; in rv770_populate_sclk_value()501 pi->clk_regs.rv770.cg_spll_spread_spectrum; in rv770_populate_sclk_value()[all …]
487 pi->clk_regs.rv770.mpll_ad_func_cntl; in cypress_populate_mclk_value()489 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in cypress_populate_mclk_value()491 pi->clk_regs.rv770.mpll_dq_func_cntl; in cypress_populate_mclk_value()493 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in cypress_populate_mclk_value()495 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in cypress_populate_mclk_value()497 pi->clk_regs.rv770.dll_cntl; in cypress_populate_mclk_value()498 u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1; in cypress_populate_mclk_value()499 u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2; in cypress_populate_mclk_value()1250 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl); in cypress_populate_smc_initial_state()1252 cpu_to_be32(pi->clk_regs.rv770.mpll_ad_func_cntl_2); in cypress_populate_smc_initial_state()[all …]
303 *value = rdev->config.rv770.tile_config; in radeon_info_ioctl()360 *value = rdev->config.rv770.max_backends; in radeon_info_ioctl()377 *value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()397 *value = rdev->config.rv770.backend_map; in radeon_info_ioctl()426 *value = rdev->config.rv770.max_pipes; in radeon_info_ioctl()560 *value = rdev->config.rv770.active_simds; in radeon_info_ioctl()
70 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
63 struct rv770_clock_registers rv770; member
2288 track->npipes = p->rdev->config.rv770.tiling_npipes; in r600_cs_parse()2289 track->nbanks = p->rdev->config.rv770.tiling_nbanks; in r600_cs_parse()2290 track->group_size = p->rdev->config.rv770.tiling_group_size; in r600_cs_parse()
2242 struct rv770_asic rv770; member
2733 radeon_ring_write(ring, rdev->config.rv770.max_hw_contexts - 1); in r600_cp_start()
98 def : Processor<"rv770", R600_VLIW5_Itin,
529 struct rv770_clock_registers rv770; member
163 ``rv770`` ``r600`` dGPU - Does not1106 ``EF_AMDGPU_MACH_R600_RV770`` 0x007 ``rv770``