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Searched refs:riscv_cpu_mbox (Results 1 – 2 of 2) sorted by relevance

/netbsd-src/sys/arch/riscv/riscv/
H A Dcpu_subr.c80 volatile u_long riscv_cpu_mbox[N] __cacheline_aligned = { }; variable
113 for (size_t n = 0; n < __arraycount(riscv_cpu_mbox); n++) in cpu_boot_secondary_processors()
114 atomic_or_ulong(&riscv_cpu_mbox[n], riscv_cpu_hatched[n]); in cpu_boot_secondary_processors()
126 while (atomic_load_acquire(&riscv_cpu_mbox[off]) & bit) { in cpu_boot_secondary_processors()
173 atomic_and_ulong(&riscv_cpu_mbox[off], ~bit); in cpu_clr_mbox()
H A Dlocore.S458 PTR_LA t0, _C_LABEL(riscv_cpu_mbox)