| /netbsd-src/sys/arch/mips/atheros/ |
| H A D | ar9344.c | 125 uint32_t ref_clk; in ar9344_get_freqs() local
129 ref_clk = 40 * 1000000; in ar9344_get_freqs()
131 ref_clk = 25 * 1000000; in ar9344_get_freqs()
134 freqs->freq_ref = ref_clk; in ar9344_get_freqs()
145 const uint32_t cpu_pll_freq = (nint * ref_clk / ref_div) >> out_div; in ar9344_get_freqs()
156 const uint32_t ddr_pll_freq = (nint * ref_clk / ref_div) >> out_div; in ar9344_get_freqs()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| H A D | vlv_dsi_pll.c | 68 int delta, ref_clk; in dsi_calc_mnp() local
77 ref_clk = 100000; in dsi_calc_mnp()
82 ref_clk = 25000; in dsi_calc_mnp()
90 delta = abs(target_dsi_clk - (m_min * ref_clk) / (p_min * n)); in dsi_calc_mnp()
98 int calc_dsi_clk = (m * ref_clk) / (p * n); in dsi_calc_mnp()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/radeon/ |
| H A D | radeon_rv6xx_dpm.c | 168 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_output_stepping() local
188 fb_divider = ((step->vco_frequency * pi->spll_ref_div) / ref_clk) >> in rv6xx_output_stepping()
433 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_compute_count_for_delay() local
435 return rv6xx_scale_count_given_unit(rdev, delay_us * (ref_clk / 100), unit); in rv6xx_compute_count_for_delay()
556 u32 ref_clk = rdev->clock.spll.reference_freq; in rv6xx_program_engine_spread_spectrum() local
566 vco_freq = rv6xx_calculate_vco_frequency(ref_clk, ÷rs, in rv6xx_program_engine_spread_spectrum()
572 (ref_clk / (dividers.ref_div + 1)), in rv6xx_program_engine_spread_spectrum()
578 (ref_clk / (dividers.ref_div + 1))); in rv6xx_program_engine_spread_spectrum()
637 u32 ref_clk, in rv6xx_find_memory_clock_with_highest_vco() argument
647 vco_freq_temp = rv6xx_calculate_vco_frequency(ref_clk, &req_dividers, in rv6xx_find_memory_clock_with_highest_vco()
[all …]
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| H A D | radeon_cypress_dpm.c | 449 u32 ref_clk = rdev->clock.mpll.reference_freq; in cypress_map_clkf_to_ibias() local
450 u32 vco = clkf * ref_clk; in cypress_map_clkf_to_ibias()
453 if (ref_clk == 10000) { in cypress_map_clkf_to_ibias()
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| H A D | da850-enbw-cmc.dts | 34 &ref_clk {
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| H A D | da850.dtsi | 82 ref_clk: ref_clk { label
85 clock-output-names = "ref_clk";
138 clocks = <&ref_clk>, <&pll1_sysclk 3>;
698 clocks = <&ref_clk>;
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| H A D | zynq-7000.dtsi | 216 clock-names = "ref_clk", "pclk";
228 clock-names = "ref_clk", "pclk";
358 clock-names = "ref_clk";
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| H A D | owl-s500-roseapplepi.dts | 243 ref_clk-pinconf {
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| H A D | da850-lcdk.dts | 168 &ref_clk {
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| H A D | da850-evm.dts | 157 &ref_clk {
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| H A D | da850-lego-ev3.dts | 209 &ref_clk {
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| H A D | imx7d-zii-rpu2.dts | 455 clock-names = "clk_in", "ref_clk";
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/ |
| H A D | hihope-rev4.dtsi | 58 clock-names = "clk_in", "ref_clk";
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| H A D | ulcb.dtsi | 239 clock-names = "clk_in", "ref_clk";
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| H A D | r8a77995-draak.dts | 442 clock-names = "clk_in", "ref_clk";
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| H A D | r8a77990-ebisu.dts | 486 clock-names = "clk_in", "ref_clk";
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| H A D | salvator-common.dtsi | 503 clock-names = "clk_in", "ref_clk";
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| /netbsd-src/sys/arch/arm/sociox/ |
| H A D | if_scx.c | 700 long ref_clk; in scx_fdt_attach() local
724 ref_clk = get_clk_freq(phandle, "phy_ref_clk"); in scx_fdt_attach()
725 if (ref_clk == -1) in scx_fdt_attach()
726 ref_clk = 250 * 1000 * 1000; in scx_fdt_attach()
732 phy_mode, (int)phy_id, ref_clk); in scx_fdt_attach()
754 sc->sc_freq = ref_clk; in scx_fdt_attach()
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/xilinx/ |
| H A D | zynqmp.dtsi | 644 clock-names = "ref_clk", "pclk";
736 clock-names = "ref_clk", "pclk";
748 clock-names = "ref_clk", "pclk";
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| H A D | amdgpu_vegam_smumgr.c | 675 uint32_t i, ref_clk; in vegam_get_sclk_range_table() local
679 ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in vegam_get_sclk_range_table()
704 (ref_clk * Range_Table[i].fcw_trans_lower) >> Range_Table[i].postdiv; in vegam_get_sclk_range_table()
706 (ref_clk * Range_Table[i].fcw_trans_upper) >> Range_Table[i].postdiv; in vegam_get_sclk_range_table()
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| H A D | amdgpu_polaris10_smumgr.c | 807 uint32_t i, ref_clk; in polaris10_get_sclk_range_table() local
811 ref_clk = amdgpu_asic_get_xclk((struct amdgpu_device *)hwmgr->adev); in polaris10_get_sclk_range_table()
830 …smu_data->range_table[i].trans_lower_frequency = (ref_clk * Range_Table[i].fcw_trans_lower) >> Ran… in polaris10_get_sclk_range_table()
831 …smu_data->range_table[i].trans_upper_frequency = (ref_clk * Range_Table[i].fcw_trans_upper) >> Ran… in polaris10_get_sclk_range_table()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| H A D | dcn20_link_encoder.h | 272 uint32_t ref_clk; member
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mq-zii-ultra.dtsi | 462 clock-names = "clk_in", "ref_clk";
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/exynos/ |
| H A D | exynos7.dtsi | 656 clock-names = "ref_clk", "rx1_symbol_clk",
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| /netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/hisilicon/ |
| H A D | hi3670.dtsi | 673 clock-names = "ref_clk", "phy_clk";
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