Searched refs:range_table (Results 1 – 6 of 6) sorted by relevance
62 struct polaris10_range_table range_table[NUM_SCLK_RANGE]; member
71 struct vegam_range_table range_table[NUM_SCLK_RANGE]; member
703 smu_data->range_table[i].trans_lower_frequency = in vegam_get_sclk_range_table()705 smu_data->range_table[i].trans_upper_frequency = in vegam_get_sclk_range_table()754 if (clock > smu_data->range_table[i].trans_lower_frequency in vegam_calculate_sclk_params()755 && clock <= smu_data->range_table[i].trans_upper_frequency) { in vegam_calculate_sclk_params()
830 …smu_data->range_table[i].trans_lower_frequency = (ref_clk * Range_Table[i].fcw_trans_lower) >> Ran… in polaris10_get_sclk_range_table()831 …smu_data->range_table[i].trans_upper_frequency = (ref_clk * Range_Table[i].fcw_trans_upper) >> Ran… in polaris10_get_sclk_range_table()879 if (clock > smu_data->range_table[i].trans_lower_frequency in polaris10_calculate_sclk_params()880 && clock <= smu_data->range_table[i].trans_upper_frequency) { in polaris10_calculate_sclk_params()
1049 struct atom_memory_clock_range_table *range_table) in cypress_retrieve_ac_timing_for_all_ranges() argument1054 for (i = 0; i < range_table->num_entries; i++) { in cypress_retrieve_ac_timing_for_all_ranges()1056 range_table->mclk[i]; in cypress_retrieve_ac_timing_for_all_ranges()1057 radeon_atom_set_ac_timing(rdev, range_table->mclk[i]); in cypress_retrieve_ac_timing_for_all_ranges()1062 eg_pi->mc_reg_table.num_entries = range_table->num_entries; in cypress_retrieve_ac_timing_for_all_ranges()1066 for (j = 1; j < range_table->num_entries; j++) { in cypress_retrieve_ac_timing_for_all_ranges()1080 struct atom_memory_clock_range_table range_table = { 0 }; in cypress_initialize_mc_reg_table() local1085 module_index, &range_table); in cypress_initialize_mc_reg_table()1089 cypress_retrieve_ac_timing_for_all_ranges(rdev, &range_table); in cypress_initialize_mc_reg_table()
8717 (add_high_low_attributes, dwarf2out_finish): Adjust for range_table