| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/fifo/ |
| H A D | nouveau_nvkm_engine_fifo_dmag84.c | 72 nvkm_kmap(chan->ramfc); in g84_fifo_dma_new()
73 nvkm_wo32(chan->ramfc, 0x08, lower_32_bits(args->v0.offset)); in g84_fifo_dma_new()
74 nvkm_wo32(chan->ramfc, 0x0c, upper_32_bits(args->v0.offset)); in g84_fifo_dma_new()
75 nvkm_wo32(chan->ramfc, 0x10, lower_32_bits(args->v0.offset)); in g84_fifo_dma_new()
76 nvkm_wo32(chan->ramfc, 0x14, upper_32_bits(args->v0.offset)); in g84_fifo_dma_new()
77 nvkm_wo32(chan->ramfc, 0x3c, 0x003f6078); in g84_fifo_dma_new()
78 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in g84_fifo_dma_new()
79 nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); in g84_fifo_dma_new()
80 nvkm_wo32(chan->ramfc, 0x4c, 0xffffffff); in g84_fifo_dma_new()
81 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in g84_fifo_dma_new()
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| H A D | nouveau_nvkm_engine_fifo_dmanv50.c | 72 nvkm_kmap(chan->ramfc); in nv50_fifo_dma_new()
73 nvkm_wo32(chan->ramfc, 0x08, lower_32_bits(args->v0.offset)); in nv50_fifo_dma_new()
74 nvkm_wo32(chan->ramfc, 0x0c, upper_32_bits(args->v0.offset)); in nv50_fifo_dma_new()
75 nvkm_wo32(chan->ramfc, 0x10, lower_32_bits(args->v0.offset)); in nv50_fifo_dma_new()
76 nvkm_wo32(chan->ramfc, 0x14, upper_32_bits(args->v0.offset)); in nv50_fifo_dma_new()
77 nvkm_wo32(chan->ramfc, 0x3c, 0x003f6078); in nv50_fifo_dma_new()
78 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in nv50_fifo_dma_new()
79 nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); in nv50_fifo_dma_new()
80 nvkm_wo32(chan->ramfc, 0x4c, 0xffffffff); in nv50_fifo_dma_new()
81 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in nv50_fifo_dma_new()
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| H A D | nouveau_nvkm_engine_fifo_dmanv40.c | 84 nvkm_kmap(imem->ramfc); in nv40_fifo_dma_engine_fini()
85 nvkm_wo32(imem->ramfc, chan->ramfc + ctx, 0x00000000); in nv40_fifo_dma_engine_fini()
86 nvkm_done(imem->ramfc); in nv40_fifo_dma_engine_fini()
115 nvkm_kmap(imem->ramfc); in nv40_fifo_dma_engine_init()
116 nvkm_wo32(imem->ramfc, chan->ramfc + ctx, inst); in nv40_fifo_dma_engine_init()
117 nvkm_done(imem->ramfc); in nv40_fifo_dma_engine_init()
227 chan->ramfc = chan->base.chid * 128; in nv40_fifo_dma_new()
229 nvkm_kmap(imem->ramfc); in nv40_fifo_dma_new()
230 nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); in nv40_fifo_dma_new()
231 nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); in nv40_fifo_dma_new()
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| H A D | nouveau_nvkm_engine_fifo_gpfifog84.c | 76 nvkm_kmap(chan->ramfc); in g84_fifo_gpfifo_new()
77 nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); in g84_fifo_gpfifo_new()
78 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in g84_fifo_gpfifo_new()
79 nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); in g84_fifo_gpfifo_new()
80 nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset)); in g84_fifo_gpfifo_new()
81 nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); in g84_fifo_gpfifo_new()
82 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in g84_fifo_gpfifo_new()
83 nvkm_wo32(chan->ramfc, 0x78, 0x00000000); in g84_fifo_gpfifo_new()
84 nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); in g84_fifo_gpfifo_new()
85 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in g84_fifo_gpfifo_new()
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| H A D | nouveau_nvkm_engine_fifo_dmanv04.c | 84 struct nvkm_memory *fctx = device->imem->ramfc; in nv04_fifo_dma_fini()
88 u32 data = chan->ramfc; in nv04_fifo_dma_fini()
102 c = fifo->ramfc; in nv04_fifo_dma_fini()
113 c = fifo->ramfc; in nv04_fifo_dma_fini()
150 const struct nv04_fifo_ramfc *c = fifo->ramfc; in nv04_fifo_dma_dtor()
152 nvkm_kmap(imem->ramfc); in nv04_fifo_dma_dtor()
154 nvkm_wo32(imem->ramfc, chan->ramfc + c->ctxp, 0x00000000); in nv04_fifo_dma_dtor()
156 nvkm_done(imem->ramfc); in nv04_fifo_dma_dtor()
208 chan->ramfc = chan->base.chid * 32; in nv04_fifo_dma_new()
210 nvkm_kmap(imem->ramfc); in nv04_fifo_dma_new()
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| H A D | nouveau_nvkm_engine_fifo_dmanv10.c | 79 chan->ramfc = chan->base.chid * 32; in nv10_fifo_dma_new()
81 nvkm_kmap(imem->ramfc); in nv10_fifo_dma_new()
82 nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); in nv10_fifo_dma_new()
83 nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); in nv10_fifo_dma_new()
84 nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); in nv10_fifo_dma_new()
85 nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, in nv10_fifo_dma_new()
92 nvkm_done(imem->ramfc); in nv10_fifo_dma_new()
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| H A D | nouveau_nvkm_engine_fifo_dmanv17.c | 80 chan->ramfc = chan->base.chid * 64; in nv17_fifo_dma_new()
82 nvkm_kmap(imem->ramfc); in nv17_fifo_dma_new()
83 nvkm_wo32(imem->ramfc, chan->ramfc + 0x00, args->v0.offset); in nv17_fifo_dma_new()
84 nvkm_wo32(imem->ramfc, chan->ramfc + 0x04, args->v0.offset); in nv17_fifo_dma_new()
85 nvkm_wo32(imem->ramfc, chan->ramfc + 0x0c, chan->base.push->addr >> 4); in nv17_fifo_dma_new()
86 nvkm_wo32(imem->ramfc, chan->ramfc + 0x14, in nv17_fifo_dma_new()
93 nvkm_done(imem->ramfc); in nv17_fifo_dma_new()
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| H A D | nouveau_nvkm_engine_fifo_gpfifonv50.c | 76 nvkm_kmap(chan->ramfc); in nv50_fifo_gpfifo_new()
77 nvkm_wo32(chan->ramfc, 0x3c, 0x403f6078); in nv50_fifo_gpfifo_new()
78 nvkm_wo32(chan->ramfc, 0x44, 0x01003fff); in nv50_fifo_gpfifo_new()
79 nvkm_wo32(chan->ramfc, 0x48, chan->base.push->node->offset >> 4); in nv50_fifo_gpfifo_new()
80 nvkm_wo32(chan->ramfc, 0x50, lower_32_bits(ioffset)); in nv50_fifo_gpfifo_new()
81 nvkm_wo32(chan->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); in nv50_fifo_gpfifo_new()
82 nvkm_wo32(chan->ramfc, 0x60, 0x7fffffff); in nv50_fifo_gpfifo_new()
83 nvkm_wo32(chan->ramfc, 0x78, 0x00000000); in nv50_fifo_gpfifo_new()
84 nvkm_wo32(chan->ramfc, 0x7c, 0x30000001); in nv50_fifo_gpfifo_new()
85 nvkm_wo32(chan->ramfc, 0x80, ((chan->ramht->bits - 9) << 27) | in nv50_fifo_gpfifo_new()
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| H A D | nouveau_nvkm_engine_fifo_nv17.c | 63 struct nvkm_memory *ramfc = imem->ramfc; in nv17_fifo_init() local
72 nvkm_wr32(device, NV03_PFIFO_RAMFC, nvkm_memory_addr(ramfc) >> 8 | in nv17_fifo_init()
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| H A D | nouveau_nvkm_engine_fifo_nv40.c | 73 struct nvkm_memory *ramfc = imem->ramfc; in nv40_fifo_init() local
101 nvkm_memory_addr(ramfc)) >> 16) | in nv40_fifo_init()
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| H A D | nouveau_nvkm_engine_fifo_nv04.c | 311 struct nvkm_memory *ramfc = imem->ramfc; in nv04_fifo_init() local
320 nvkm_wr32(device, NV03_PFIFO_RAMFC, nvkm_memory_addr(ramfc) >> 8); in nv04_fifo_init()
334 int index, int nr, const struct nv04_fifo_ramfc *ramfc, in nv04_fifo_new_() argument
342 fifo->ramfc = ramfc; in nv04_fifo_new_()
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| H A D | nouveau_nvkm_engine_fifo_channv50.c | 203 u64 addr = chan->ramfc->addr >> 12; in nv50_fifo_chan_init()
218 nvkm_gpuobj_del(&chan->ramfc); in nv50_fifo_chan_dtor()
258 &chan->ramfc); in nv50_fifo_chan_ctor()
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| H A D | nv04.h | 19 const struct nv04_fifo_ramfc *ramfc; member
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| H A D | channv04.h | 13 u32 ramfc; member
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| H A D | channv50.h | 14 struct nvkm_gpuobj *ramfc; member
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| H A D | nouveau_nvkm_engine_fifo_chang84.c | 215 u64 addr = chan->ramfc->addr >> 8; in g84_fifo_chan_init()
284 &chan->ramfc); in g84_fifo_chan_ctor()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/instmem/ |
| H A D | nouveau_nvkm_subdev_instmem_nv04.c | 195 &imem->base.ramfc); in nv04_instmem_oneinit()
212 nvkm_memory_unref(&imem->base.ramfc); in nv04_instmem_dtor()
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| H A D | nouveau_nvkm_subdev_instmem_nv40.c | 241 &imem->base.ramfc); in nv40_instmem_oneinit()
252 nvkm_memory_unref(&imem->base.ramfc); in nv40_instmem_dtor()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/ |
| H A D | instmem.h | 21 struct nvkm_memory *ramfc; member
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