| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/fb/ |
| H A D | nouveau_nvkm_subdev_fb_gddr5.c | 40 nvkm_gddr5_calc(struct nvkm_ram *ram, bool nuts) in nvkm_gddr5_calc() argument 44 int rq = ram->freq < 1000000; /* XXX */ in nvkm_gddr5_calc() 46 xd = !ram->next->bios.ramcfg_DLLoff; in nvkm_gddr5_calc() 48 switch (ram->next->bios.ramcfg_ver) { in nvkm_gddr5_calc() 50 pd = ram->next->bios.ramcfg_11_01_80; in nvkm_gddr5_calc() 51 lf = ram->next->bios.ramcfg_11_01_40; in nvkm_gddr5_calc() 52 vh = ram->next->bios.ramcfg_11_02_10; in nvkm_gddr5_calc() 53 vr = ram->next->bios.ramcfg_11_02_04; in nvkm_gddr5_calc() 54 vo = ram->next->bios.ramcfg_11_06; in nvkm_gddr5_calc() 55 l3 = !ram->next->bios.ramcfg_11_07_02; in nvkm_gddr5_calc() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ramgk104.c | 148 struct gk104_ram *ram = container_of(fuc, typeof(*ram), fuc); in gk104_ram_train() local 154 for (i = 0; (data & 0x80000000) && i < ram->parts; addr += 0x1000, i++) { in gk104_ram_train() 155 if (ram->pmask & (1 << i)) in gk104_ram_train() 164 struct gk104_ram *ram = container_of(fuc, typeof(*ram), fuc); in r1373f4_init() local 165 const u32 mcoef = ((--ram->P2 << 28) | (ram->N2 << 8) | ram->M2); in r1373f4_init() 166 const u32 rcoef = (( ram->P1 << 16) | (ram->N1 << 8) | ram->M1); in r1373f4_init() 167 const u32 runk0 = ram->fN1 << 16; in r1373f4_init() 168 const u32 runk1 = ram->fN1; in r1373f4_init() 170 if (ram->from == 2) { in r1373f4_init() 196 if (ram->mode == 2) { in r1373f4_init() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ramnv50.c | 78 nv50_ram_timing_calc(struct nv50_ram *ram, u32 *timing) in nv50_ram_timing_calc() argument 80 struct nvbios_ramcfg *cfg = &ram->base.target.bios; in nv50_ram_timing_calc() 81 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv50_ram_timing_calc() 91 switch ((!T(CWL)) * ram->base.type) { in nv50_ram_timing_calc() 102 unkt3b = 0x19 + ram->base.next->bios.rammap_00_16_40; in nv50_ram_timing_calc() 104 ram->base.next->bios.rammap_00_16_40) << 16 | in nv50_ram_timing_calc() 138 if (ram->base.type == NVKM_RAM_TYPE_DDR2) { in nv50_ram_timing_calc() 142 if (ram->base.type == NVKM_RAM_TYPE_GDDR3) { in nv50_ram_timing_calc() 156 nv50_ram_timing_read(struct nv50_ram *ram, u32 *timing) in nv50_ram_timing_read() argument 159 struct nvbios_ramcfg *cfg = &ram->base.target.bios; in nv50_ram_timing_read() [all …]
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| H A D | nouveau_nvkm_subdev_fb_gddr3.c | 76 nvkm_gddr3_calc(struct nvkm_ram *ram) in nvkm_gddr3_calc() argument 80 switch (ram->next->bios.timing_ver) { in nvkm_gddr3_calc() 82 CWL = ram->next->bios.timing_10_CWL; in nvkm_gddr3_calc() 83 CL = ram->next->bios.timing_10_CL; in nvkm_gddr3_calc() 84 WR = ram->next->bios.timing_10_WR; in nvkm_gddr3_calc() 85 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_gddr3_calc() 86 ODT = ram->next->bios.timing_10_ODT; in nvkm_gddr3_calc() 87 RON = ram->next->bios.ramcfg_RON; in nvkm_gddr3_calc() 90 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_gddr3_calc() 91 CL = (ram->next->bios.timing[1] & 0x0000001f) >> 0; in nvkm_gddr3_calc() [all …]
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| H A D | nouveau_nvkm_subdev_fb_sddr3.c | 76 nvkm_sddr3_calc(struct nvkm_ram *ram) in nvkm_sddr3_calc() argument 80 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_sddr3_calc() 82 switch (ram->next->bios.timing_ver) { in nvkm_sddr3_calc() 84 if (ram->next->bios.timing_hdr < 0x17) { in nvkm_sddr3_calc() 88 CWL = ram->next->bios.timing_10_CWL; in nvkm_sddr3_calc() 89 CL = ram->next->bios.timing_10_CL; in nvkm_sddr3_calc() 90 WR = ram->next->bios.timing_10_WR; in nvkm_sddr3_calc() 91 ODT = ram->next->bios.timing_10_ODT; in nvkm_sddr3_calc() 94 CWL = (ram->next->bios.timing[1] & 0x00000f80) >> 7; in nvkm_sddr3_calc() 95 CL = (ram->next->bios.timing[1] & 0x0000001f) >> 0; in nvkm_sddr3_calc() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ramgt215.c | 159 gt215_link_train(struct gt215_ram *ram) in gt215_link_train() argument 161 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train() 162 struct gt215_ramfuc *fuc = &ram->fuc; in gt215_link_train() 163 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in gt215_link_train() 199 ret = ram->base.func->calc(&ram->base, (u32) M0205T.freq * 1000); in gt215_link_train() 242 ram->base.func->calc(&ram->base, clk_current); in gt215_link_train() 251 ram_train_result(ram->base.fb, result, 64); in gt215_link_train() 277 gt215_link_train_init(struct gt215_ram *ram) in gt215_link_train_init() argument 285 struct gt215_ltrain *train = &ram->ltrain; in gt215_link_train_init() 286 struct nvkm_device *device = ram->base.fb->subdev.device; in gt215_link_train_init() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ramgf100.c | 114 struct gf100_ram *ram = container_of(fuc, typeof(*ram), fuc); in gf100_ram_train() local 115 struct nvkm_fb *fb = ram->base.fb; in gf100_ram_train() 134 struct gf100_ram *ram = gf100_ram(base); in gf100_ram_calc() local 135 struct gf100_ramfuc *fuc = &ram->fuc; in gf100_ram_calc() 136 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in gf100_ram_calc() 185 ret = ram_init(fuc, ram->base.fb); in gf100_ram_calc() 220 ret = gt215_pll_calc(subdev, &ram->refpll, ram->mempll.refclk, in gf100_ram_calc() 235 ret = gt215_pll_calc(subdev, &ram->mempll, freq, in gf100_ram_calc() 414 struct gf100_ram *ram = gf100_ram(base); in gf100_ram_prog() local 415 struct nvkm_device *device = ram->base.fb->subdev.device; in gf100_ram_prog() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ram.c | 39 struct nvkm_ram *ram; member 91 mutex_lock(&vram->ram->fb->subdev.mutex); in nvkm_vram_dtor() 94 nvkm_mm_free(&vram->ram->vram, &node); in nvkm_vram_dtor() 96 mutex_unlock(&vram->ram->fb->subdev.mutex); in nvkm_vram_dtor() 114 struct nvkm_ram *ram; in nvkm_ram_get() local 124 if (!device->fb || !(ram = device->fb->ram)) in nvkm_ram_get() 126 ram = device->fb->ram; in nvkm_ram_get() 127 mm = &ram->vram; in nvkm_ram_get() 132 vram->ram = ram; in nvkm_ram_get() 136 mutex_lock(&ram->fb->subdev.mutex); in nvkm_ram_get() [all …]
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| H A D | ramfuc.h | 61 ramfuc_init(struct ramfuc *ram, struct nvkm_fb *fb) in ramfuc_init() argument 63 int ret = nvkm_memx_init(fb->subdev.device->pmu, &ram->memx); in ramfuc_init() 67 ram->sequence++; in ramfuc_init() 68 ram->fb = fb; in ramfuc_init() 73 ramfuc_exec(struct ramfuc *ram, bool exec) in ramfuc_exec() argument 76 if (ram->fb) { in ramfuc_exec() 77 ret = nvkm_memx_fini(&ram->memx, exec); in ramfuc_exec() 78 ram->fb = NULL; in ramfuc_exec() 84 ramfuc_rd32(struct ramfuc *ram, struct ramfuc_reg *reg) in ramfuc_rd32() argument 86 struct nvkm_device *device = ram->fb->subdev.device; in ramfuc_rd32() [all …]
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| H A D | nouveau_nvkm_subdev_fb_sddr2.c | 67 nvkm_sddr2_calc(struct nvkm_ram *ram) in nvkm_sddr2_calc() argument 71 switch (ram->next->bios.timing_ver) { in nvkm_sddr2_calc() 73 CL = ram->next->bios.timing_10_CL; in nvkm_sddr2_calc() 74 WR = ram->next->bios.timing_10_WR; in nvkm_sddr2_calc() 75 DLL = !ram->next->bios.ramcfg_DLLoff; in nvkm_sddr2_calc() 76 ODT = ram->next->bios.timing_10_ODT & 3; in nvkm_sddr2_calc() 79 CL = (ram->next->bios.timing[1] & 0x0000001f); in nvkm_sddr2_calc() 80 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16; in nvkm_sddr2_calc() 86 if (ram->next->bios.timing_ver == 0x20 || in nvkm_sddr2_calc() 87 ram->next->bios.ramcfg_timing == 0xff) { in nvkm_sddr2_calc() [all …]
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| H A D | nouveau_nvkm_subdev_fb_rammcp77.c | 40 struct mcp77_ram *ram = mcp77_ram(base); in mcp77_ram_init() local 41 struct nvkm_device *device = ram->base.fb->subdev.device; in mcp77_ram_init() 42 u32 dniso = ((ram->base.size - (ram->poller_base + 0x00)) >> 5) - 1; in mcp77_ram_init() 43 u32 hostnb = ((ram->base.size - (ram->poller_base + 0x20)) >> 5) - 1; in mcp77_ram_init() 44 u32 flush = ((ram->base.size - (ram->poller_base + 0x40)) >> 5) - 1; in mcp77_ram_init() 71 struct mcp77_ram *ram; in mcp77_ram_new() local 74 if (!(ram = kzalloc(sizeof(*ram), GFP_KERNEL))) in mcp77_ram_new() 76 *pram = &ram->base; in mcp77_ram_new() 79 size, &ram->base); in mcp77_ram_new() 83 ram->poller_base = size - rsvd_tail; in mcp77_ram_new() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ramnv40.c | 41 struct nv40_ram *ram = nv40_ram(base); in nv40_ram_calc() local 42 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv40_ram_calc() 58 ram->ctrl = 0x80000000 | (log2P << 16); in nv40_ram_calc() 59 ram->ctrl |= min(pll.bias_p + log2P, (int)pll.max_p) << 20; in nv40_ram_calc() 61 ram->ctrl |= 0x00000100; in nv40_ram_calc() 62 ram->coef = (N1 << 8) | M1; in nv40_ram_calc() 64 ram->ctrl |= 0x40000000; in nv40_ram_calc() 65 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc() 74 struct nv40_ram *ram = nv40_ram(base); in nv40_ram_prog() local 75 struct nvkm_subdev *subdev = &ram->base.fb->subdev; in nv40_ram_prog() [all …]
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| H A D | nouveau_nvkm_subdev_fb_ramgp100.c | 36 gp100_ram_init(struct nvkm_ram *ram) in gp100_ram_init() argument 38 struct nvkm_subdev *subdev = &ram->fb->subdev; in gp100_ram_init() 97 struct nvkm_ram *ram; in gp100_ram_new() local 99 if (!(ram = *pram = kzalloc(sizeof(*ram), GFP_KERNEL))) in gp100_ram_new() 102 return gf100_ram_ctor(&gp100_ram, fb, ram); in gp100_ram_new()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bus/ |
| H A D | hwsq.h | 63 hwsq_init(struct hwsq *ram, struct nvkm_subdev *subdev) in hwsq_init() argument 67 ret = nvkm_hwsq_init(subdev, &ram->hwsq); in hwsq_init() 71 ram->sequence++; in hwsq_init() 72 ram->subdev = subdev; in hwsq_init() 77 hwsq_exec(struct hwsq *ram, bool exec) in hwsq_exec() argument 80 if (ram->subdev) { in hwsq_exec() 81 ret = nvkm_hwsq_fini(&ram->hwsq, exec); in hwsq_exec() 82 ram->subdev = NULL; in hwsq_exec() 88 hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg) in hwsq_rd32() argument 90 struct nvkm_device *device = ram->subdev->device; in hwsq_rd32() [all …]
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| /netbsd-src/lib/libkvm/ |
| H A D | kvm_or1k.c | 93 phys_ram_seg_t *ram; in _kvm_pa2off() local 99 ram = (void *)((char *)(void *)cpu_kh + ALIGN(sizeof *cpu_kh)); in _kvm_pa2off() 102 if (pa >= ram->start && (pa - ram->start) < ram->size) { in _kvm_pa2off() 103 return off + (pa - ram->start); in _kvm_pa2off() 105 ram++; in _kvm_pa2off() 106 off += ram->size; in _kvm_pa2off() 107 } while ((void *) ram < e && ram->size); in _kvm_pa2off()
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| H A D | kvm_riscv.c | 93 phys_ram_seg_t *ram; in _kvm_pa2off() local 99 ram = (void *)((char *)(void *)cpu_kh + ALIGN(sizeof *cpu_kh)); in _kvm_pa2off() 102 if (pa >= ram->start && (pa - ram->start) < ram->size) { in _kvm_pa2off() 103 return off + (pa - ram->start); in _kvm_pa2off() 105 ram++; in _kvm_pa2off() 106 off += ram->size; in _kvm_pa2off() 107 } while ((void *) ram < e && ram in _kvm_pa2off() [all...] |
| H A D | kvm_powerpc64.c | 141 phys_ram_seg_t *ram; in _kvm_pa2off() local 147 ram = (void *)((char *)(void *)cpu_kh + ALIGN(sizeof *cpu_kh)); in _kvm_pa2off() 150 if (pa >= ram->start && (pa - ram->start) < ram->size) { in _kvm_pa2off() 151 return off + (pa - ram->start); in _kvm_pa2off() 153 ram++; in _kvm_pa2off() 154 off += ram->size; in _kvm_pa2off() 155 } while ((void *) ram < e && ram->size); in _kvm_pa2off()
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| /netbsd-src/usr.sbin/nvmmctl/ |
| H A D | nvmmctl.c | 116 char buf[256], ram[4+1]; in nvmm_identify() local 128 if (humanize_number(ram, sizeof(ram), cap.max_ram, NULL, HN_AUTOSCALE, in nvmm_identify() 131 printf("nvmm: Max RAM per machine %s\n", ram); in nvmm_identify() 147 char ram[4+1], *ts; in nvmm_list() local 172 if (humanize_number(ram, sizeof(ram), machinfo.nram, NULL, in nvmm_list() 176 printf("%-10zu %-5u %-4s %-9d %s\n", i, machinfo.nvcpus, ram, in nvmm_list()
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| /netbsd-src/sys/arch/evbsh3/conf/ |
| H A D | sh.x.ICE | 5 ram : o = 0x0c010000, l = 16M 14 } > ram 19 } > ram 26 } > ram 31 } > ram
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| H A D | shl.x.RAM | 5 ram : o = 0x8C010000, l = 16M 14 } > ram 19 } > ram 26 } > ram 31 } > ram
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| H A D | sh.x.RAM | 5 ram : o = 0x8C010000, l = 16M 14 } > ram 19 } > ram 26 } > ram 31 } > ram
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| H A D | shl.x.ICE | 5 ram : o = 0x0c010000, l = 16M 14 } > ram 19 } > ram 26 } > ram 31 } > ram
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| H A D | sh.x | 5 ram : o = 0x8C010000, l = 16M in OUTPUT_ARCH() 17 } > ram in AT() 23 } > ram 31 } > ram 36 } > ram
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| /netbsd-src/sys/arch/mmeye/conf/ |
| H A D | sh.x.ICE | 5 ram : o = 0x0c010000, l = 4M 14 } > ram 19 } > ram 26 } > ram 31 } > ram
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| H A D | sh.x.RAM | 5 ram : o = 0x8C010000, l = 4M 14 } > ram 19 } > ram 26 } > ram 31 } > ram
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