/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUMachineCFGStructurizer.cpp | 252 dbgs() << "Dest: " << printReg(Element.DestReg, TRI) in dump() 255 dbgs() << printReg(SI.first, TRI) << '(' << printMBBReference(*SI.second) in dump() 485 dbgs() << " In: " << printReg(getBBSelectRegIn(), TRI); in dump() 486 dbgs() << ", Out: " << printReg(getBBSelectRegOut(), TRI) << "\n"; in dump() 535 dbgs() << " In: " << printReg(getBBSelectRegIn(), TRI); in dump() 536 dbgs() << ", Out: " << printReg(getBBSelectRegOut(), TRI) << "\n"; in dump() 680 LLVM_DEBUG(dbgs() << "Considering Register: " << printReg(Reg, TRI) in storeLiveOutReg() 685 LLVM_DEBUG(dbgs() << "Add LiveOut (PHI): " << printReg(Reg, TRI) << "\n"); in storeLiveOutReg() 692 << "): " << printReg(Reg, TRI) << "\n"); in storeLiveOutReg() 703 LLVM_DEBUG(dbgs() << "Add LiveOut (Loop): " << printReg(Reg, TRI) in storeLiveOutReg() [all …]
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H A D | GCNNSAReassign.cpp | 310 << " " << llvm::printReg((VRM->getPhys(LI->reg())), TRI); in runOnMachineFunction() 348 << llvm::printReg((VRM->getPhys(Intervals.front()->reg())), TRI) in runOnMachineFunction() 350 << llvm::printReg((VRM->getPhys(Intervals.back()->reg())), TRI) in runOnMachineFunction()
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H A D | GCNRegPressure.cpp | 39 dbgs() << " " << printReg(Reg, MRI.getTargetRegisterInfo()) in printLivesAt() 439 dbgs() << " " << printReg(P.first, TRI) in reportMismatch() 444 dbgs() << " " << printReg(P.first, TRI) in reportMismatch() 455 dbgs() << " " << printReg(P.first, TRI) in reportMismatch()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | AggressiveAntiDepBreaker.cpp | 139 << " " << printReg(r, TRI)); in AggressiveAntiDepBreaker() 213 << " " << printReg(Reg, TRI) << "=g" << State->GetGroup(Reg) in Observe() 318 dbgs() << header << printReg(Reg, TRI); in HandleLastUse() 334 dbgs() << header << printReg(Reg, TRI); in HandleLastUse() 337 LLVM_DEBUG(dbgs() << " " << printReg(SubregReg, TRI) << "->g" in HandleLastUse() 373 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI) << "=g" in PrescanInstruction() 394 << printReg(AliasReg, TRI) << ")"); in PrescanInstruction() 469 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI) << "=g" in ScanInstruction() 505 LLVM_DEBUG(dbgs() << "=" << printReg(Reg, TRI)); in ScanInstruction() 508 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI)); in ScanInstruction() [all …]
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H A D | RegAllocFast.cpp | 406 LLVM_DEBUG(dbgs() << "Spilling " << printReg(VirtReg, TRI) in spill() 407 << " in " << printReg(AssignedReg, TRI)); in spill() 462 LLVM_DEBUG(dbgs() << "Reloading " << printReg(VirtReg, TRI) << " into " in reload() 463 << printReg(PhysReg, TRI) << '\n'); in reload() 594 LLVM_DEBUG(dbgs() << "Freeing " << printReg(PhysReg, TRI) << ':'); in freePhysReg() 608 LLVM_DEBUG(dbgs() << ' ' << printReg(LRI->VirtReg, TRI) << '\n'); in freePhysReg() 627 << printReg(PhysReg, TRI) << '\n'); in calcSpillCost() 678 LLVM_DEBUG(dbgs() << "Assigning " << printReg(VirtReg, TRI) << " to " in assignVirtToPhysReg() 679 << printReg(PhysReg, TRI) << '\n'); in assignVirtToPhysReg() 735 LLVM_DEBUG(dbgs() << "Search register for " << printReg(VirtReg) in allocVirtReg() [all …]
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H A D | LiveRegMatrix.cpp | 105 LLVM_DEBUG(dbgs() << "assigning " << printReg(VirtReg.reg(), TRI) << " to " in assign() 106 << printReg(PhysReg, TRI) << ':'); in assign() 123 LLVM_DEBUG(dbgs() << "unassigning " << printReg(VirtReg.reg(), TRI) in unassign() 124 << " from " << printReg(PhysReg, TRI) << ':'); in unassign()
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H A D | FixupStatepointCallerSaved.cpp | 153 << printReg(Reg, &TRI) << " -> " << printReg(SrcReg, &TRI) in performCopyPropagation() 260 << printReg(Reg, &TRI) << " at " in getFrameIndex() 291 << printReg(Reg, &TRI) << " at landing pad " in getFrameIndex() 393 LLVM_DEBUG(dbgs() << "Will spill " << printReg(Reg, &TRI) << " at index " in findRegistersToSpill() 414 LLVM_DEBUG(dbgs() << "Spilling " << printReg(Reg, &TRI) << " to FI " << FI in spillRegisters() 458 LLVM_DEBUG(dbgs() << "Reloading " << printReg(Reg, &TRI) << " from FI " in insertReloads()
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H A D | RegAllocGreedy.cpp | 823 LLVM_DEBUG(dbgs() << "missed hint " << printReg(PhysHint, TRI) << '\n'); in tryAssign() 843 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << " is available at cost " in tryAssign() 874 << printReg(PrevReg, TRI) << " to " in canReassign() 875 << printReg(PhysReg, TRI) << '\n'); in canReassign() 1102 LLVM_DEBUG(dbgs() << "evicting " << printReg(PhysReg, TRI) in evictInterference() 1197 dbgs() << printReg(PhysReg, TRI) << " would clobber CSR " in tryEvict() 1198 << printReg(RegClassInfo.getLastCalleeSavedAlias(PhysReg), TRI) in tryEvict() 1919 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tno positive bundles\n"); in calculateRegionSplitCost() 1922 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tstatic = "; in calculateRegionSplitCost() 1930 << printReg(GlobalCand[BestCand].PhysReg, TRI) << '\n'; in calculateRegionSplitCost() [all …]
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H A D | RegisterCoalescer.cpp | 666 LLVM_DEBUG(dbgs() << "Extending: " << printReg(IntB.reg(), TRI)); in adjustCopiesBackFrom() 1967 << printReg(CP.getSrcReg(), TRI) << " with " in joinCopy() 1968 << printReg(CP.getDstReg(), TRI, CP.getSrcIdx()) << '\n'); in joinCopy() 1989 dbgs() << printReg(CP.getDstReg()) << " in " in joinCopy() 1991 << printReg(CP.getSrcReg()) << " in " in joinCopy() 1994 dbgs() << printReg(CP.getSrcReg(), TRI) << " in " in joinCopy() 1995 << printReg(CP.getDstReg(), TRI, CP.getSrcIdx()) << '\n'; in joinCopy() 2102 dbgs() << "\tSuccess: " << printReg(CP.getSrcReg(), TRI, CP.getSrcIdx()) in joinCopy() 2103 << " -> " << printReg(CP.getDstReg(), TRI, CP.getDstIdx()) << '\n'; in joinCopy() 2106 dbgs() << printReg(CP.getDstReg(), TRI); in joinCopy() [all …]
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H A D | RegisterScavenging.cpp | 271 LLVM_DEBUG(dbgs() << "Scavenger found unused reg: " << printReg(Reg, TRI) in FindUnusedReg() 550 LLVM_DEBUG(dbgs() << "Scavenged register: " << printReg(SReg, TRI) << "\n"); in scavengeRegister() 561 << printReg(SReg, TRI) << "\n"); in scavengeRegister() 583 LLVM_DEBUG(dbgs() << "Scavenged free register: " << printReg(Reg, TRI) in scavengeRegisterBackwards() 601 LLVM_DEBUG(dbgs() << "Scavenged register with spill: " << printReg(Reg, TRI) in scavengeRegisterBackwards()
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H A D | MachineRegisterInfo.cpp | 224 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList() 233 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList() 239 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList() 245 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList()
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H A D | TargetRegisterInfo.cpp | 94 dbgs() << "Error: Super register " << printReg(*SR, this) in checkAllSuperRegsMarked() 95 << " of reserved register " << printReg(Reg, this) in checkAllSuperRegsMarked() 110 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg() function 671 dbgs() << printReg(Reg, TRI, SubRegIndex) << "\n"; in dumpReg()
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H A D | RenameIndependentSubregs.cpp | 137 LLVM_DEBUG(dbgs() << printReg(Reg) << ": Found " << Classes.getNumClasses() in INITIALIZE_PASS_DEPENDENCY() 139 LLVM_DEBUG(dbgs() << printReg(Reg) << ": Splitting into newly created:"); in INITIALIZE_PASS_DEPENDENCY() 145 LLVM_DEBUG(dbgs() << ' ' << printReg(NewVReg)); in INITIALIZE_PASS_DEPENDENCY()
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H A D | AllocationOrder.cpp | 43 dbgs() << ' ' << printReg(Hints[I], TRI); in create()
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H A D | MachineCopyPropagation.cpp | 550 LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI) in forwardUses() 551 << "\n with " << printReg(CopySrcReg, TRI) in forwardUses() 811 LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MODef.getReg(), TRI) in propagateDefs() 812 << "\n with " << printReg(Def, TRI) << "\n in " in propagateDefs()
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H A D | StackMaps.cpp | 287 OS << printReg(Loc.Reg, TRI); in print() 294 OS << printReg(Loc.Reg, TRI); in print() 303 OS << printReg(Loc.Reg, TRI); in print() 327 OS << printReg(LO.Reg, TRI); in print()
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H A D | CriticalAntiDepBreaker.cpp | 473 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI)); in BreakAntiDependencies() 653 << printReg(AntiDepReg, TRI) << " with " in BreakAntiDependencies() 655 << " using " << printReg(NewReg, TRI) << "!\n"); in BreakAntiDependencies()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64A57FPLoadBalancing.cpp | 543 LLVM_DEBUG(dbgs() << " - Scavenged register: " << printReg(Reg, TRI) << "\n"); in colorChain() 617 << printReg(DestReg, TRI) << " at " << *MI); in scanInstruction() 637 << printReg(AccumReg, TRI) << " in MI " << *MI); in scanInstruction() 663 << printReg(DestReg, TRI) << "\n"); in scanInstruction() 691 LLVM_DEBUG(dbgs() << "Kill seen for chain " << printReg(MO.getReg(), TRI) in maybeKillChain() 703 << printReg(I->first, TRI) << "\n"); in maybeKillChain()
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H A D | AArch64PBQPRegAlloc.cpp | 249 LLVM_DEBUG(dbgs() << "Moving acc chain from " << printReg(Ra, TRI) in addInterChainConstraint() 250 << " to " << printReg(Rd, TRI) << '\n';); in addInterChainConstraint() 255 LLVM_DEBUG(dbgs() << "Creating new acc chain for " << printReg(Rd, TRI) in addInterChainConstraint() 342 LLVM_DEBUG(dbgs() << "Killing chain " << printReg(r, TRI) << " at "; in apply()
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H A D | AArch64SpeculationHardening.cpp | 310 if (TmpReg != 0) dbgs() << printReg(TmpReg, TRI) << " "; in instrumentControlFlow() 335 << printReg(MI_Reg.second, TRI) in instrumentControlFlow() 345 << printReg(MI_Reg.second, TRI) in instrumentControlFlow()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonGenInsert.cpp | 194 OS << ' ' << printReg(R, P.TRI); in operator <<() 435 OS << printReg(*I, P.TRI); in operator <<() 488 OS << '(' << printReg(SrcR, P.TRI) << ',' << printReg(InsR, P.TRI) in operator <<() 589 dbgs() << " " << printReg(I->first, HRI) << ":\n"; in dump_map() 802 dbgs() << __func__ << ": " << printReg(VR, HRI) in findRecordInsertForms() 867 dbgs() << "Prefixes matching register " << printReg(VR, HRI) << "\n"; in findRecordInsertForms() 872 dbgs() << " (" << printReg(LL[i].first, HRI) << ",@" in findRecordInsertForms() 919 dbgs() << printReg(VR, HRI) << " = insert(" << printReg(SrcR, HRI) in findRecordInsertForms() 920 << ',' << printReg(InsR, HRI) << ",#" << L << ",#" in findRecordInsertForms() 1543 dbgs() << printReg(VR, HRI) << " -> " << Pos << "\n"; in runOnMachineFunction()
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H A D | HexagonGenPredicate.cpp | 80 return OS << printReg(PR.Reg.R, &PR.TRI, PR.Reg.S); in operator <<() 228 LLVM_DEBUG(dbgs() << __func__ << ": " << printReg(Reg.R, TRI, Reg.S) << "\n"); in processPredicateGPR() 233 LLVM_DEBUG(dbgs() << "Dead reg: " << printReg(Reg.R, TRI, Reg.S) << '\n'); in processPredicateGPR()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | MVETPAndVPTOptimisationsPass.cpp | 742 << "Replacing all uses of '" << printReg(Result) in ReduceOldVCCRValueUses() 743 << "' with '" << printReg(LastVPNOTResult) << "'\n"); in ReduceOldVCCRValueUses() 752 LLVM_DEBUG(dbgs() << "Replacing use of '" << printReg(VCCRValue) in ReduceOldVCCRValueUses() 753 << "' with '" << printReg(LastVPNOTResult) in ReduceOldVCCRValueUses() 766 << printReg(OppositeVCCRValue) << "' with '" in ReduceOldVCCRValueUses() 767 << printReg(LastVPNOTResult) << " for instr: "; in ReduceOldVCCRValueUses()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCRegisterInfo.cpp | 68 LLVM_DEBUG(dbgs() << "Scavenged register " << printReg(BaseReg, TRI) in ReplaceFrameIndex() 69 << " for FrameReg=" << printReg(FrameReg, TRI) in ReplaceFrameIndex()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | RegisterBankInfo.cpp | 469 LLVM_DEBUG(dbgs() << " changed, replace " << printReg(OrigReg, nullptr)); in applyDefaultMapping() 471 LLVM_DEBUG(dbgs() << " with " << printReg(NewReg, nullptr)); in applyDefaultMapping() 795 OS << '(' << printReg(getMI().getOperand(Idx).getReg(), TRI) << ", ["; in print() 801 OS << printReg(VReg, TRI); in print()
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