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Searched refs:printReg (Results 1 – 25 of 84) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUMachineCFGStructurizer.cpp252 dbgs() << "Dest: " << printReg(Element.DestReg, TRI) in dump()
255 dbgs() << printReg(SI.first, TRI) << '(' << printMBBReference(*SI.second) in dump()
485 dbgs() << " In: " << printReg(getBBSelectRegIn(), TRI); in dump()
486 dbgs() << ", Out: " << printReg(getBBSelectRegOut(), TRI) << "\n"; in dump()
535 dbgs() << " In: " << printReg(getBBSelectRegIn(), TRI); in dump()
536 dbgs() << ", Out: " << printReg(getBBSelectRegOut(), TRI) << "\n"; in dump()
680 LLVM_DEBUG(dbgs() << "Considering Register: " << printReg(Reg, TRI) in storeLiveOutReg()
685 LLVM_DEBUG(dbgs() << "Add LiveOut (PHI): " << printReg(Reg, TRI) << "\n"); in storeLiveOutReg()
692 << "): " << printReg(Reg, TRI) << "\n"); in storeLiveOutReg()
703 LLVM_DEBUG(dbgs() << "Add LiveOut (Loop): " << printReg(Reg, TRI) in storeLiveOutReg()
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H A DGCNNSAReassign.cpp310 << " " << llvm::printReg((VRM->getPhys(LI->reg())), TRI); in runOnMachineFunction()
348 << llvm::printReg((VRM->getPhys(Intervals.front()->reg())), TRI) in runOnMachineFunction()
350 << llvm::printReg((VRM->getPhys(Intervals.back()->reg())), TRI) in runOnMachineFunction()
H A DGCNRegPressure.cpp39 dbgs() << " " << printReg(Reg, MRI.getTargetRegisterInfo()) in printLivesAt()
439 dbgs() << " " << printReg(P.first, TRI) in reportMismatch()
444 dbgs() << " " << printReg(P.first, TRI) in reportMismatch()
455 dbgs() << " " << printReg(P.first, TRI) in reportMismatch()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DAggressiveAntiDepBreaker.cpp139 << " " << printReg(r, TRI)); in AggressiveAntiDepBreaker()
213 << " " << printReg(Reg, TRI) << "=g" << State->GetGroup(Reg) in Observe()
318 dbgs() << header << printReg(Reg, TRI); in HandleLastUse()
334 dbgs() << header << printReg(Reg, TRI); in HandleLastUse()
337 LLVM_DEBUG(dbgs() << " " << printReg(SubregReg, TRI) << "->g" in HandleLastUse()
373 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI) << "=g" in PrescanInstruction()
394 << printReg(AliasReg, TRI) << ")"); in PrescanInstruction()
469 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI) << "=g" in ScanInstruction()
505 LLVM_DEBUG(dbgs() << "=" << printReg(Reg, TRI)); in ScanInstruction()
508 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI)); in ScanInstruction()
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H A DRegAllocFast.cpp406 LLVM_DEBUG(dbgs() << "Spilling " << printReg(VirtReg, TRI) in spill()
407 << " in " << printReg(AssignedReg, TRI)); in spill()
462 LLVM_DEBUG(dbgs() << "Reloading " << printReg(VirtReg, TRI) << " into " in reload()
463 << printReg(PhysReg, TRI) << '\n'); in reload()
594 LLVM_DEBUG(dbgs() << "Freeing " << printReg(PhysReg, TRI) << ':'); in freePhysReg()
608 LLVM_DEBUG(dbgs() << ' ' << printReg(LRI->VirtReg, TRI) << '\n'); in freePhysReg()
627 << printReg(PhysReg, TRI) << '\n'); in calcSpillCost()
678 LLVM_DEBUG(dbgs() << "Assigning " << printReg(VirtReg, TRI) << " to " in assignVirtToPhysReg()
679 << printReg(PhysReg, TRI) << '\n'); in assignVirtToPhysReg()
735 LLVM_DEBUG(dbgs() << "Search register for " << printReg(VirtReg) in allocVirtReg()
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H A DLiveRegMatrix.cpp105 LLVM_DEBUG(dbgs() << "assigning " << printReg(VirtReg.reg(), TRI) << " to " in assign()
106 << printReg(PhysReg, TRI) << ':'); in assign()
123 LLVM_DEBUG(dbgs() << "unassigning " << printReg(VirtReg.reg(), TRI) in unassign()
124 << " from " << printReg(PhysReg, TRI) << ':'); in unassign()
H A DFixupStatepointCallerSaved.cpp153 << printReg(Reg, &TRI) << " -> " << printReg(SrcReg, &TRI) in performCopyPropagation()
260 << printReg(Reg, &TRI) << " at " in getFrameIndex()
291 << printReg(Reg, &TRI) << " at landing pad " in getFrameIndex()
393 LLVM_DEBUG(dbgs() << "Will spill " << printReg(Reg, &TRI) << " at index " in findRegistersToSpill()
414 LLVM_DEBUG(dbgs() << "Spilling " << printReg(Reg, &TRI) << " to FI " << FI in spillRegisters()
458 LLVM_DEBUG(dbgs() << "Reloading " << printReg(Reg, &TRI) << " from FI " in insertReloads()
H A DRegAllocGreedy.cpp823 LLVM_DEBUG(dbgs() << "missed hint " << printReg(PhysHint, TRI) << '\n'); in tryAssign()
843 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << " is available at cost " in tryAssign()
874 << printReg(PrevReg, TRI) << " to " in canReassign()
875 << printReg(PhysReg, TRI) << '\n'); in canReassign()
1102 LLVM_DEBUG(dbgs() << "evicting " << printReg(PhysReg, TRI) in evictInterference()
1197 dbgs() << printReg(PhysReg, TRI) << " would clobber CSR " in tryEvict()
1198 << printReg(RegClassInfo.getLastCalleeSavedAlias(PhysReg), TRI) in tryEvict()
1919 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tno positive bundles\n"); in calculateRegionSplitCost()
1922 LLVM_DEBUG(dbgs() << printReg(PhysReg, TRI) << "\tstatic = "; in calculateRegionSplitCost()
1930 << printReg(GlobalCand[BestCand].PhysReg, TRI) << '\n'; in calculateRegionSplitCost()
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H A DRegisterCoalescer.cpp666 LLVM_DEBUG(dbgs() << "Extending: " << printReg(IntB.reg(), TRI)); in adjustCopiesBackFrom()
1967 << printReg(CP.getSrcReg(), TRI) << " with " in joinCopy()
1968 << printReg(CP.getDstReg(), TRI, CP.getSrcIdx()) << '\n'); in joinCopy()
1989 dbgs() << printReg(CP.getDstReg()) << " in " in joinCopy()
1991 << printReg(CP.getSrcReg()) << " in " in joinCopy()
1994 dbgs() << printReg(CP.getSrcReg(), TRI) << " in " in joinCopy()
1995 << printReg(CP.getDstReg(), TRI, CP.getSrcIdx()) << '\n'; in joinCopy()
2102 dbgs() << "\tSuccess: " << printReg(CP.getSrcReg(), TRI, CP.getSrcIdx()) in joinCopy()
2103 << " -> " << printReg(CP.getDstReg(), TRI, CP.getDstIdx()) << '\n'; in joinCopy()
2106 dbgs() << printReg(CP.getDstReg(), TRI); in joinCopy()
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H A DRegisterScavenging.cpp271 LLVM_DEBUG(dbgs() << "Scavenger found unused reg: " << printReg(Reg, TRI) in FindUnusedReg()
550 LLVM_DEBUG(dbgs() << "Scavenged register: " << printReg(SReg, TRI) << "\n"); in scavengeRegister()
561 << printReg(SReg, TRI) << "\n"); in scavengeRegister()
583 LLVM_DEBUG(dbgs() << "Scavenged free register: " << printReg(Reg, TRI) in scavengeRegisterBackwards()
601 LLVM_DEBUG(dbgs() << "Scavenged register with spill: " << printReg(Reg, TRI) in scavengeRegisterBackwards()
H A DMachineRegisterInfo.cpp224 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList()
233 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList()
239 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList()
245 errs() << printReg(Reg, getTargetRegisterInfo()) in verifyUseList()
H A DTargetRegisterInfo.cpp94 dbgs() << "Error: Super register " << printReg(*SR, this) in checkAllSuperRegsMarked()
95 << " of reserved register " << printReg(Reg, this) in checkAllSuperRegsMarked()
110 Printable printReg(Register Reg, const TargetRegisterInfo *TRI, in printReg() function
671 dbgs() << printReg(Reg, TRI, SubRegIndex) << "\n"; in dumpReg()
H A DRenameIndependentSubregs.cpp137 LLVM_DEBUG(dbgs() << printReg(Reg) << ": Found " << Classes.getNumClasses() in INITIALIZE_PASS_DEPENDENCY()
139 LLVM_DEBUG(dbgs() << printReg(Reg) << ": Splitting into newly created:"); in INITIALIZE_PASS_DEPENDENCY()
145 LLVM_DEBUG(dbgs() << ' ' << printReg(NewVReg)); in INITIALIZE_PASS_DEPENDENCY()
H A DAllocationOrder.cpp43 dbgs() << ' ' << printReg(Hints[I], TRI); in create()
H A DMachineCopyPropagation.cpp550 LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI) in forwardUses()
551 << "\n with " << printReg(CopySrcReg, TRI) in forwardUses()
811 LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MODef.getReg(), TRI) in propagateDefs()
812 << "\n with " << printReg(Def, TRI) << "\n in " in propagateDefs()
H A DStackMaps.cpp287 OS << printReg(Loc.Reg, TRI); in print()
294 OS << printReg(Loc.Reg, TRI); in print()
303 OS << printReg(Loc.Reg, TRI); in print()
327 OS << printReg(LO.Reg, TRI); in print()
H A DCriticalAntiDepBreaker.cpp473 LLVM_DEBUG(dbgs() << " " << printReg(Reg, TRI)); in BreakAntiDependencies()
653 << printReg(AntiDepReg, TRI) << " with " in BreakAntiDependencies()
655 << " using " << printReg(NewReg, TRI) << "!\n"); in BreakAntiDependencies()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64A57FPLoadBalancing.cpp543 LLVM_DEBUG(dbgs() << " - Scavenged register: " << printReg(Reg, TRI) << "\n"); in colorChain()
617 << printReg(DestReg, TRI) << " at " << *MI); in scanInstruction()
637 << printReg(AccumReg, TRI) << " in MI " << *MI); in scanInstruction()
663 << printReg(DestReg, TRI) << "\n"); in scanInstruction()
691 LLVM_DEBUG(dbgs() << "Kill seen for chain " << printReg(MO.getReg(), TRI) in maybeKillChain()
703 << printReg(I->first, TRI) << "\n"); in maybeKillChain()
H A DAArch64PBQPRegAlloc.cpp249 LLVM_DEBUG(dbgs() << "Moving acc chain from " << printReg(Ra, TRI) in addInterChainConstraint()
250 << " to " << printReg(Rd, TRI) << '\n';); in addInterChainConstraint()
255 LLVM_DEBUG(dbgs() << "Creating new acc chain for " << printReg(Rd, TRI) in addInterChainConstraint()
342 LLVM_DEBUG(dbgs() << "Killing chain " << printReg(r, TRI) << " at "; in apply()
H A DAArch64SpeculationHardening.cpp310 if (TmpReg != 0) dbgs() << printReg(TmpReg, TRI) << " "; in instrumentControlFlow()
335 << printReg(MI_Reg.second, TRI) in instrumentControlFlow()
345 << printReg(MI_Reg.second, TRI) in instrumentControlFlow()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonGenInsert.cpp194 OS << ' ' << printReg(R, P.TRI); in operator <<()
435 OS << printReg(*I, P.TRI); in operator <<()
488 OS << '(' << printReg(SrcR, P.TRI) << ',' << printReg(InsR, P.TRI) in operator <<()
589 dbgs() << " " << printReg(I->first, HRI) << ":\n"; in dump_map()
802 dbgs() << __func__ << ": " << printReg(VR, HRI) in findRecordInsertForms()
867 dbgs() << "Prefixes matching register " << printReg(VR, HRI) << "\n"; in findRecordInsertForms()
872 dbgs() << " (" << printReg(LL[i].first, HRI) << ",@" in findRecordInsertForms()
919 dbgs() << printReg(VR, HRI) << " = insert(" << printReg(SrcR, HRI) in findRecordInsertForms()
920 << ',' << printReg(InsR, HRI) << ",#" << L << ",#" in findRecordInsertForms()
1543 dbgs() << printReg(VR, HRI) << " -> " << Pos << "\n"; in runOnMachineFunction()
H A DHexagonGenPredicate.cpp80 return OS << printReg(PR.Reg.R, &PR.TRI, PR.Reg.S); in operator <<()
228 LLVM_DEBUG(dbgs() << __func__ << ": " << printReg(Reg.R, TRI, Reg.S) << "\n"); in processPredicateGPR()
233 LLVM_DEBUG(dbgs() << "Dead reg: " << printReg(Reg.R, TRI, Reg.S) << '\n'); in processPredicateGPR()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DMVETPAndVPTOptimisationsPass.cpp742 << "Replacing all uses of '" << printReg(Result) in ReduceOldVCCRValueUses()
743 << "' with '" << printReg(LastVPNOTResult) << "'\n"); in ReduceOldVCCRValueUses()
752 LLVM_DEBUG(dbgs() << "Replacing use of '" << printReg(VCCRValue) in ReduceOldVCCRValueUses()
753 << "' with '" << printReg(LastVPNOTResult) in ReduceOldVCCRValueUses()
766 << printReg(OppositeVCCRValue) << "' with '" in ReduceOldVCCRValueUses()
767 << printReg(LastVPNOTResult) << " for instr: "; in ReduceOldVCCRValueUses()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
H A DARCRegisterInfo.cpp68 LLVM_DEBUG(dbgs() << "Scavenged register " << printReg(BaseReg, TRI) in ReplaceFrameIndex()
69 << " for FrameReg=" << printReg(FrameReg, TRI) in ReplaceFrameIndex()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DRegisterBankInfo.cpp469 LLVM_DEBUG(dbgs() << " changed, replace " << printReg(OrigReg, nullptr)); in applyDefaultMapping()
471 LLVM_DEBUG(dbgs() << " with " << printReg(NewReg, nullptr)); in applyDefaultMapping()
795 OS << '(' << printReg(getMI().getOperand(Idx).getReg(), TRI) << ", ["; in print()
801 OS << printReg(VReg, TRI); in print()

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