Searched refs:power_level (Results 1 – 7 of 7) sorted by relevance
180 uint16_t power_level; member210 uint16_t power_level; member246 uint16_t power_level; member481 uint16_t power_level);493 uint16_t power_level);
355 uint16_t power_level) in xcb_dpms_force_level_checked() argument368 xcb_out.power_level = power_level; in xcb_dpms_force_level_checked()381 uint16_t power_level) in xcb_dpms_force_level() argument394 xcb_out.power_level = power_level; in xcb_dpms_force_level()
685 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr, context); in dce_update_clocks()687 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()688 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce_update_clocks()690 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce_update_clocks()712 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr, context); in dce11_update_clocks()714 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()715 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce11_update_clocks()717 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce11_update_clocks()739 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr, context); in dce112_update_clocks()741 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce112_update_clocks()[all …]
210 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce112_update_clocks()212 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce112_update_clocks()213 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce112_update_clocks()215 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce112_update_clocks()
265 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce11_update_clocks()267 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce11_update_clocks()268 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce11_update_clocks()270 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce11_update_clocks()
412 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce_update_clocks()414 if ((level_change_req.power_level < clk_mgr_dce->cur_min_clks_state && safe_to_lower) in dce_update_clocks()415 || level_change_req.power_level > clk_mgr_dce->cur_min_clks_state) { in dce_update_clocks()417 clk_mgr_dce->cur_min_clks_state = level_change_req.power_level; in dce_update_clocks()
252 enum dm_pp_clocks_state power_level; member