| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| H A D | amdgpu_hwmgr.c | 421 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PCIEPerformanceRequest); in hwmgr_init_default_caps()
423 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_UVDDPM); in hwmgr_init_default_caps()
424 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_VCEDPM); in hwmgr_init_default_caps()
428 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PCIEPerformanceRequest); in hwmgr_init_default_caps()
431 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in hwmgr_init_default_caps()
434 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in hwmgr_init_default_caps()
437 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in hwmgr_init_default_caps()
440 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in hwmgr_init_default_caps()
443 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in hwmgr_init_default_caps()
446 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in hwmgr_init_default_caps()
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| H A D | amdgpu_vega12_processpptables.c | 44 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
46 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
212 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl); in init_powerplay_table_information()
215 hwmgr->platform_descriptor.overdriveLimit.engineClock = VEGA12_ENGINECLOCK_HARDMAX; in init_powerplay_table_information()
217 hwmgr->platform_descriptor.overdriveLimit.engineClock = in init_powerplay_table_information()
219 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_powerplay_table_information()
235 if (hwmgr->platform_descriptor.overdriveLimit.engineClock > 0 in init_powerplay_table_information()
236 && hwmgr->platform_descriptor.overdriveLimit.memoryClock > 0) in init_powerplay_table_information()
237 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_ACOverdriveSupport); in init_powerplay_table_information()
247 …hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODS… in init_powerplay_table_information()
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| H A D | amdgpu_processpptables.c | 452 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
454 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
999 hwmgr->platform_descriptor.overdriveLimit.engineClock = in init_overdrive_limits_V1_4()
1002 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_overdrive_limits_V1_4()
1005 hwmgr->platform_descriptor.maxOverdriveVDDC = in init_overdrive_limits_V1_4()
1008 hwmgr->platform_descriptor.minOverdriveVDDC = in init_overdrive_limits_V1_4()
1011 hwmgr->platform_descriptor.maxOverdriveVDDC = in init_overdrive_limits_V1_4()
1014 hwmgr->platform_descriptor.overdriveVDDCStep = 0; in init_overdrive_limits_V1_4()
1037 hwmgr->platform_descriptor.overdriveLimit.engineClock = le32_to_cpu(header->ulMaxEngineClock); in init_overdrive_limits_V2_1()
1038 hwmgr->platform_descriptor.overdriveLimit.memoryClock = le32_to_cpu(header->ulMaxMemoryClock); in init_overdrive_limits_V2_1()
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| H A D | amdgpu_vega12_hwmgr.c | 145 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
148 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
151 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
155 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
157 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
162 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
165 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
169 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
172 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
174 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega12_set_features_platform_caps()
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| H A D | amdgpu_vega20_powertune.c | 52 return (tdp_percentage_adjustment > hwmgr->platform_descriptor.TDPLimit) ? -1 : 0; in vega20_validate_power_level_request()
68 hwmgr->platform_descriptor.TDPAdjustmentPolarity ? in vega20_power_control_set_level()
69 hwmgr->platform_descriptor.TDPAdjustment : in vega20_power_control_set_level()
70 (-1 * hwmgr->platform_descriptor.TDPAdjustment); in vega20_power_control_set_level()
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| H A D | amdgpu_vega10_processpptables.c | 47 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
49 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
179 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in init_thermal_controller()
224 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in init_thermal_controller()
268 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in init_thermal_controller()
332 hwmgr->platform_descriptor.overdriveLimit.engineClock = in init_over_drive_limits()
335 hwmgr->platform_descriptor.overdriveLimit.engineClock = in init_over_drive_limits()
337 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_over_drive_limits()
340 hwmgr->platform_descriptor.minOverdriveVDDC = 0; in init_over_drive_limits()
341 hwmgr->platform_descriptor.maxOverdriveVDDC = 0; in init_over_drive_limits()
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| H A D | amdgpu_process_pptables_v1_0.c | 48 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
50 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
269 hwmgr->platform_descriptor.TDPODLimit = in init_dpm_2_parameters()
271 hwmgr->platform_descriptor.TDPAdjustment = 0; in init_dpm_2_parameters()
272 hwmgr->platform_descriptor.VidAdjustment = 0; in init_dpm_2_parameters()
273 hwmgr->platform_descriptor.VidAdjustmentPolarity = 0; in init_dpm_2_parameters()
274 hwmgr->platform_descriptor.VidMinLimit = 0; in init_dpm_2_parameters()
275 hwmgr->platform_descriptor.VidMaxLimit = 1500000; in init_dpm_2_parameters()
276 hwmgr->platform_descriptor.VidStep = 6250; in init_dpm_2_parameters()
281 if (hwmgr->platform_descriptor.TDPODLimit != 0) in init_dpm_2_parameters()
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| H A D | amdgpu_vega20_hwmgr.c | 186 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
189 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
192 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
195 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
199 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
203 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
206 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
210 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
213 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
215 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega20_set_features_platform_caps()
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| H A D | amdgpu_smu8_hwmgr.c | 204 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
207 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
210 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
215 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
222 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
225 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
227 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
235 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
238 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
240 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu8_initialize_dpm_defaults()
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| H A D | amdgpu_vega10_hwmgr.c | 205 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
208 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
212 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
215 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
219 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
223 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
226 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
229 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
232 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
235 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vega10_set_features_platform_caps()
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| H A D | amdgpu_smu7_hwmgr.c | 807 if (hwmgr->platform_descriptor.overdriveLimit.engineClock == 0) in smu7_setup_dpm_tables_v1()
808 hwmgr->platform_descriptor.overdriveLimit.engineClock = dep_sclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1()
823 if (hwmgr->platform_descriptor.overdriveLimit.memoryClock == 0) in smu7_setup_dpm_tables_v1()
824 hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1()
987 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in smu7_enable_vrhot_gpio_interrupt()
1024 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in smu7_enable_deep_sleep_master_switch()
1044 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in smu7_disable_deep_sleep_master_switch()
1188 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in smu7_start_dpm()
1286 !phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in smu7_set_dpm_event_sources()
1353 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in smu7_enable_dpm_tasks()
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| H A D | amdgpu_smu10_hwmgr.c | 125 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
128 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
131 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in smu10_initialize_dpm_defaults()
527 hwmgr->platform_descriptor.hardwareActivityPerformanceLevels = in smu10_hwmgr_backend_init()
530 hwmgr->platform_descriptor.hardwarePerformanceLevels = in smu10_hwmgr_backend_init()
533 hwmgr->platform_descriptor.vbiosInterruptId = 0; in smu10_hwmgr_backend_init()
535 hwmgr->platform_descriptor.clockStep.engineClock = 500; in smu10_hwmgr_backend_init()
537 hwmgr->platform_descriptor.clockStep.memoryClock = 500; in smu10_hwmgr_backend_init()
539 hwmgr->platform_descriptor.minimumClocksReductionPercentage = 50; in smu10_hwmgr_backend_init()
767 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) { in smu10_dpm_get_pp_table_entry_callback()
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| H A D | amdgpu_vega20_processpptables.c | 46 phm_cap_set(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
48 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, cap); in set_hw_cap()
715 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in copy_overdrive_feature_capabilities_array()
839 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl); in init_powerplay_table_information()
875 …hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax… in init_powerplay_table_information()
878 if (!disable_power_control && hwmgr->platform_descriptor.TDPODLimit) in init_powerplay_table_information()
880 phm_cap_set(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_PowerControl); in init_powerplay_table_information()
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| H A D | amdgpu_smu9_baco.c | 42 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) in smu9_baco_get_capability()
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| H A D | amdgpu_smu7_baco.c | 47 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) in smu7_baco_get_capability()
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| H A D | amdgpu_vega20_baco.c | 51 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_BACO)) in vega20_baco_get_capability()
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| H A D | amdgpu_hardwaremanager.c | 258 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in phm_start_thermal_controller()
405 (hwmgr->platform_descriptor.hardwareActivityPerformanceLevels - 1), &performance_level); in phm_get_clock_info()
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| H A D | amdgpu_vega10_powertune.c | 1311 hwmgr->platform_descriptor.LoadLineSlope * 256; in vega10_initialize_power_tune_defaults()
1410 hwmgr->platform_descriptor.TDPAdjustmentPolarity ? in vega10_power_control_set_level()
1411 hwmgr->platform_descriptor.TDPAdjustment : in vega10_power_control_set_level()
1412 (-1 * hwmgr->platform_descriptor.TDPAdjustment); in vega10_power_control_set_level()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/ |
| H A D | amdgpu_fiji_smumgr.c | 701 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_populate_pm_fuses()
905 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_calculate_sclk_params()
983 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) in fiji_populate_single_graphic_level()
1738 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_populate_clock_stretcher_data_table()
1943 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
1947 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2010 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2047 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2051 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
2058 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in fiji_init_smc_table()
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| H A D | amdgpu_tonga_smumgr.c | 586 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_calculate_sclk_params()
666 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_populate_single_graphic_level()
852 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_calculate_mclk_params()
1664 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in tonga_populate_clock_stretcher_data_table()
2005 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_populate_pm_fuses()
2246 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_init_smc_table()
2251 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_init_smc_table()
2318 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in tonga_init_smc_table()
2369 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in tonga_init_smc_table()
2373 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in tonga_init_smc_table()
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| H A D | amdgpu_vegam_smumgr.c | 358 if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_uvd_smc_table()
360 phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_uvd_smc_table()
375 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_update_vce_smc_table()
393 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_StablePState)) in vegam_update_vce_smc_table()
843 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) in vegam_populate_single_graphic_level()
906 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_populate_all_graphic_levels()
1536 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in vegam_populate_clock_stretcher_data_table()
1852 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_populate_pm_fuses()
1934 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
1943 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in vegam_init_smc_table()
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| H A D | amdgpu_polaris10_smumgr.c | 596 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in polaris10_populate_pm_fuses()
951 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) in polaris10_populate_single_graphic_level()
1018 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in polaris10_populate_all_graphic_levels()
1586 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in polaris10_populate_clock_stretcher_data_table()
1844 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in polaris10_init_smc_table()
1848 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in polaris10_init_smc_table()
1907 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in polaris10_init_smc_table()
1950 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in polaris10_init_smc_table()
1957 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in polaris10_init_smc_table()
1961 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in polaris10_init_smc_table()
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| H A D | amdgpu_iceland_smumgr.c | 408 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_EVV)) { in iceland_populate_bapm_vddc_vid_sidd()
445 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_populate_pm_fuses()
843 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_calculate_sclk_params()
939 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_populate_single_graphic_level()
1100 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_calculate_mclk_params()
1949 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_init_smc_table()
1954 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in iceland_init_smc_table()
2101 …if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl… in iceland_thermal_setup_fan_table()
2105 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in iceland_thermal_setup_fan_table()
2111 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl); in iceland_thermal_setup_fan_table()
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| H A D | amdgpu_ci_smumgr.c | 343 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in ci_calculate_sclk_params()
450 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in ci_populate_single_graphic_level()
596 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_EVV)) { in ci_populate_bapm_vddc_vid_sidd()
682 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in ci_populate_pm_fuses()
1072 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in ci_calculate_mclk_params()
1960 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in ci_init_smc_table()
1965 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in ci_init_smc_table()
2078 phm_cap_set(hwmgr->platform_descriptor.platformCaps, in ci_init_smc_table()
2082 phm_cap_unset(hwmgr->platform_descriptor.platformCaps, in ci_init_smc_table()
2139 …if (!phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_MicrocodeFanControl… in ci_thermal_setup_fan_table()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| H A D | amdgpu_amd_powerplay.c | 1014 max_power_limit *= (100 + hwmgr->platform_descriptor.TDPODLimit); in pp_set_power_limit()
1040 *limit *= (100 + hwmgr->platform_descriptor.TDPODLimit); in pp_get_power_limit()
1096 if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, in pp_get_current_clocks()
1230 …if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_DynamicPatchPowerSta… in pp_get_display_mode_validation_clocks()
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