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Searched refs:pin (Results 1 – 25 of 853) sorted by relevance

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/netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
H A Dsama5d3_lcd.dtsi60 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
61 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
62 AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
63 AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
64 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
65 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
66 AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
67 AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
68 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
69 AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
H A Dexynos4412-pinctrl.dtsi3 * Samsung's Exynos4412 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos4412 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
18 samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
128 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
129 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
130 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
135 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
136 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
137 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
[all …]
H A Ds5pv210-pinctrl.dtsi24 samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
25 samsung,pin-pud-pdn = <S3C64XX_PIN_PULL_ ##_pull>; \
283 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
284 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
285 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
290 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
291 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
292 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
297 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
298 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
H A Dexynos4210-pinctrl.dtsi3 * Samsung's Exynos4210 SoC pin-mux and pin-config device tree source
10 * Samsung's Exynos4210 SoC pin-mux and pin-config optiosn are listed as device
147 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
148 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
149 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
156 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
161 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
162 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos5420-pinctrl.dtsi3 * Samsung's Exynos5420 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5420 SoC pin-mux and pin-config options are listed as device
63 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
64 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
65 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
70 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
71 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
72 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
162 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
163 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos5250-pinctrl.dtsi3 * Samsung's Exynos5250 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5250 SoC pin-mux and pin-config optiosn are listed as device
202 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
203 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
204 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
209 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
210 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
211 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
216 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
217 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
H A Ds3c64xx-pinctrl.dtsi4 * - pin control-related definitions
8 * Samsung's S3C64xx SoCs pin banks, pin-mux and pin-config options are
136 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
137 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
142 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
143 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
148 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
149 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
154 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
155 samsung,pin-pud = <S3C64XX_PIN_PULL_NONE>;
[all …]
H A Dexynos5260-pinctrl.dtsi3 * Samsung's Exynos5260 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5260 SoC pin-mux and pin-config options are listed as device
201 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
202 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
203 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
208 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
209 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
210 samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>;
215 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
216 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos3250-pinctrl.dtsi3 * Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
8 * Samsung's Exynos3250 SoCs pin-mux and pin-config optiosn are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
25 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
26 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
27 samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
33 samsung,pin-function = <EXYNOS_PIN_FUNC_OUTPUT>; \
34 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; \
[all …]
H A Dat91sam9x5_lcd.dtsi63 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD0 pin */
64 AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD1 pin */
65 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD2 pin */
66 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD3 pin */
67 AT91_PIOC 4 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD4 pin */
68 AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD5 pin */
69 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD6 pin */
70 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD7 pin */
71 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD8 pin */
72 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* LCDD9 pin */
[all …]
H A Dexynos5410-pinctrl.dtsi3 * Exynos5410 SoC pin-mux and pin-config device tree source
282 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
283 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
284 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
289 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
290 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
291 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
296 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
297 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
298 samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/exynos/
H A Dexynos5433-pinctrl.dtsi3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device
17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \
18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \
134 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
135 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
136 samsung,pin-drv = <EXYNOS5433_PIN_DRV_FAST_SR1>;
141 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
142 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
[all …]
H A Dexynos7-pinctrl.dtsi3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as
189 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
190 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
191 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
196 samsung,pin-function = <EXYNOS_PIN_FUNC_2>;
197 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
198 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
203 samsung,pin-function = <EXYNOS_PIN_FUNC_3>;
204 samsung,pin-pud = <EXYNOS_PIN_PULL_UP>;
[all …]
/netbsd-src/sys/arch/arm/imx/
H A Dimx23_pinctrl.c312 #define PIN2MUXSEL_REG(pin) \ argument
313 ((pin / 16) * MUXSEL_REG_SIZE + HW_PINCTRL_MUXSEL0)
314 #define PIN2MUXSEL_SET_REG(pin) \ argument
315 ((pin / 16) * MUXSEL_REG_SIZE + HW_PINCTRL_MUXSEL0_SET)
316 #define PIN2MUXSEL_CLR_REG(pin) \ argument
317 ((pin / 16) * MUXSEL_REG_SIZE + HW_PINCTRL_MUXSEL0_CLR)
318 #define PIN2MUXSEL_MASK(pin) (3<<(pin % 16 * 2)) argument
321 #define PIN2DRIVE_REG(pin) \ argument
322 ((pin / 8) * DRIVE_REG_SIZE + HW_PINCTRL_DRIVE0)
323 #define PIN2DRIVE_SET_REG(pin) \ argument
[all …]
/netbsd-src/sys/arch/arm/xilinx/
H A Dzynq_gpio.c48 #define MASK_DATA_REG(pin) (0x000 + 0x4 * ((pin) / 16)) argument
49 #define DATA_RO_REG(pin) (0x060 + 0x4 * ((pin) / 32)) argument
50 #define DATA_RO_BIT(pin) __BIT((pin) % 32) argument
51 #define DIRM_REG(pin) (0x204 + 0x40 * ((pin) / 32)) argument
52 #define DIRM_BIT(pin) __BIT((pin) % 32) argument
53 #define OEN_REG(pin) (0x208 + 0x40 * ((pin) / 32)) argument
54 #define OEN_BIT(pin) __BIT((pin) % 32) argument
93 zynq_gpio_ctl(struct zynq_gpio_softc *sc, u_int pin, int flags) in zynq_gpio_ctl() argument
99 dirm = RD4(sc, DIRM_REG(pin)); in zynq_gpio_ctl()
100 oen = RD4(sc, OEN_REG(pin)); in zynq_gpio_ctl()
[all …]
/netbsd-src/sys/arch/mips/alchemy/dev/
H A Daugpio.c96 int pin; in augpio_attach() local
136 for (pin = 0; pin < sc->sc_npins; pin++) { in augpio_attach()
137 gpio_pin_t *pp = &sc->sc_pins[pin]; in augpio_attach()
139 pp->pin_num = pin; in augpio_attach()
141 pp->pin_flags = sc->sc_getctl(sc, pin); in augpio_attach()
142 pp->pin_state = sc->sc_gc.gp_pin_read(sc, pin); in augpio_attach()
155 augpio_read(void *arg, int pin) in augpio_read() argument
158 pin = 1 << pin; in augpio_read()
160 if (GETGPIO(AUGPIO_PINSTATERD) & pin) in augpio_read()
167 augpio_write(void *arg, int pin, int value) in augpio_write() argument
[all …]
H A Daugpiovar.h47 #define AUGPIO_READ(pin) augpio_read(NULL, (pin)) argument
48 #define AUGPIO_WRITE(pin,val) augpio_write(NULL, (pin), (val)) argument
49 #define AUGPIO_CTL(pin,flags) augpio_ctl(NULL, (pin), (flags)) argument
50 #define AUGPIO_GETCTL(pin) augpio_getctl(NULL, (pin)) argument
52 #define AUGPIO2_READ(pin) augpio2_read(NULL, (pin)) argument
53 #define AUGPIO2_WRITE(pin,val) augpio2_write(NULL, (pin), (val)) argument
54 #define AUGPIO2_CTL(pin,flags) augpio2_ctl(NULL, (pin), (flags)) argument
55 #define AUGPIO2_GETCTL(pin) augpio2_getctl(NULL, (pin)) argument
/netbsd-src/sys/arch/arm/rockchip/
H A Drk_gpio.c69 #define GPIOV2_SWPORT_DR_REG(pin) \ argument
70 (GPIOV2_SWPORT_DR_BASE + GPIOV2_REG_OFFSET(pin))
72 #define GPIOV2_SWPORT_DDR_REG(pin) \ argument
73 (GPIOV2_SWPORT_DDR_BASE + GPIOV2_REG_OFFSET(pin))
75 #define GPIOV2_REG_OFFSET(pin) (((pin) >> 4) << 2) argument
76 #define GPIOV2_DATA_MASK(pin) (__BIT((pin) & 0xF)) argument
77 #define GPIOV2_WRITE_MASK(pin) (__BIT(((pin) & 0xF) | 0x10)) argument
123 const uint8_t pin = be32toh(gpio[1]) & 0xff; in rk_gpio_acquire() local
126 if (pin >= __arraycount(sc->sc_pins)) in rk_gpio_acquire()
129 sc->sc_gp.gp_pin_ctl(sc, pin, flags); in rk_gpio_acquire()
[all …]
/netbsd-src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/actions/
H A Ds900-bubblegum-96.dts69 * NC = not connected (pin out but not routed from the chip to
71 * "[PER]" = pin is muxed for [peripheral] (not GPIO)
94 "GPIO-A", /* GPIO_0, LSEC pin 23 */
95 "GPIO-B", /* GPIO_1, LSEC pin 24 */
96 "GPIO-C", /* GPIO_2, LSEC pin 25 */
97 "GPIO-D", /* GPIO_3, LSEC pin 26 */
98 "GPIO-E", /* GPIO_4, LSEC pin 27 */
99 "GPIO-F", /* GPIO_5, LSEC pin 28 */
100 "GPIO-G", /* GPIO_6, LSEC pin 29 */
101 "GPIO-H", /* GPIO_7, LSEC pin 30 */
[all …]
/netbsd-src/sys/dev/gpio/
H A Dgpio.c148 int pin; in gpio_resume() local
150 for (pin = 0; pin < sc->sc_npins; pin++) { in gpio_resume()
151 gpiobus_pin_ctl(sc->sc_gc, pin, sc->sc_pins[pin].pin_flags); in gpio_resume()
152 gpiobus_pin_write(sc->sc_gc, pin, sc->sc_pins[pin].pin_state); in gpio_resume()
213 gpio_pin_defname(struct gpio_softc *sc, int pin) in gpio_pin_defname() argument
215 KASSERT(pin > in gpio_pin_defname()
235 int pin; gpio_attach() local
370 int npins, pin, i; gpio_pin_can_map() local
392 int npins, pin, i; gpio_pin_map() local
417 int pin, i; gpio_pin_unmap() local
426 gpio_pin_read(void * gpio,struct gpio_pinmap * map,int pin) gpio_pin_read() argument
434 gpio_pin_write(void * gpio,struct gpio_pinmap * map,int pin,int value) gpio_pin_write() argument
443 gpio_pin_get_conf(void * gpio,struct gpio_pinmap * map,int pin) gpio_pin_get_conf() argument
456 gpio_pin_set_conf(void * gpio,struct gpio_pinmap * map,int pin,int flags) gpio_pin_set_conf() argument
470 gpio_pin_ctl(void * gpio,struct gpio_pinmap * map,int pin,int flags) gpio_pin_ctl() argument
483 gpio_pin_caps(void * gpio,struct gpio_pinmap * map,int pin) gpio_pin_caps() argument
491 gpio_pin_intrcaps(void * gpio,struct gpio_pinmap * map,int pin) gpio_pin_intrcaps() argument
537 gpio_pin_irqmode_issupported(void * gpio,struct gpio_pinmap * map,int pin,int irqmode) gpio_pin_irqmode_issupported() argument
551 gpio_intr_establish(void * gpio,struct gpio_pinmap * map,int pin,int ipl,int irqmode,int (* func)(void *),void * arg) gpio_intr_establish() argument
584 gpio_intr_str(void * gpio,struct gpio_pinmap * map,int pin,int irqmode,char * intrstr,size_t intrstrlen) gpio_intr_str() argument
622 gpio_pin_to_pin_num(void * gpio,struct gpio_pinmap * map,int pin) gpio_pin_to_pin_num() argument
739 int error, pin, value, flags; gpio_ioctl() local
1024 int error, pin, value, flags; gpio_ioctl_oapi() local
[all...]
/netbsd-src/sys/arch/arm/ti/
H A Dti_gpio.c151 ti_gpio_ctl(struct ti_gpio_softc *sc, u_int pin, int flags) in ti_gpio_ctl() argument
159 oe |= __BIT(pin); in ti_gpio_ctl()
161 oe &= ~__BIT(pin); in ti_gpio_ctl()
164 sc->sc_pinout[pin] = (flags & GPIO_PIN_OUTPUT) != 0; in ti_gpio_ctl()
180 const uint8_t pin = be32toh(gpio[1]) & 0xff; in ti_gpio_acquire() local
183 if (pin >= __arraycount(sc->sc_pins)) in ti_gpio_acquire()
187 error = ti_gpio_ctl(sc, pin, flags); in ti_gpio_acquire()
195 gpin->pin_nr = pin; in ti_gpio_acquire()
206 struct ti_gpio_pin *pin = priv; in ti_gpio_release() local
209 ti_gpio_ctl(pin->pin_sc, pin->pin_nr, GPIO_PIN_INPUT); in ti_gpio_release()
[all …]
/netbsd-src/sys/arch/evbsh3/ap_ms104_sh4/
H A Dap_ms104_sh4.c88 gpio_intr_establish(int pin, int (*ih_func)(void *), void *ih_arg) in gpio_intr_establish() argument
93 KASSERT(pin >= 0 && pin <= 15); in gpio_intr_establish()
94 KASSERT(gpio_intr_func_table[pin].ih_func == NULL); in gpio_intr_establish()
95 KASSERT((_reg_read_4(SH4_PCTRA) & (1 << (pin * 2))) == 0); /*input*/ in gpio_intr_establish()
100 gpio_intr_func_table[pin].ih_irq = pin; in gpio_intr_establish()
101 gpio_intr_func_table[pin].ih_func = ih_func; in gpio_intr_establish()
102 gpio_intr_func_table[pin].ih_arg = ih_arg; in gpio_intr_establish()
106 reg |= 1 << pin; in gpio_intr_establish()
111 return &gpio_intr_func_table[pin]; in gpio_intr_establish()
118 int pin = ih->ih_irq; in gpior_intr_disestablish() local
[all …]
/netbsd-src/sys/arch/mips/adm5120/dev/
H A Dadmgpio.c60 admgpio_pin_ctl(void *cookie, int pin, int flags) in admgpio_pin_ctl() argument
67 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OE); in admgpio_pin_ctl()
77 admgpio_pin_read(void *cookie, int pin) in admgpio_pin_read() argument
82 KASSERT(pin >= 0 && pin < 8); in admgpio_pin_read()
84 if (sc->sc_pins[pin].pin_flags == GPIO_PIN_INPUT) in admgpio_pin_read()
85 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_IV); in admgpio_pin_read()
87 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV); in admgpio_pin_read()
95 admgpio_pin_write(void *cookie, int pin, int value) in admgpio_pin_write() argument
100 KASSERT(pin >= 0 && pin < 8); in admgpio_pin_write()
102 mask = __SHIFTIN(1 << pin, ADM5120_GPIO0_OV); in admgpio_pin_write()
[all …]
/netbsd-src/sys/dev/ic/
H A Dpl061.c51 u_int pin; in plgpio_attach() local
61 for (pin = 0; pin < 8; pin++) { in plgpio_attach()
62 sc->sc_pins[pin].pin_num = pin; in plgpio_attach()
64 if ((cnf & __BIT(pin)) != 0) in plgpio_attach()
66 sc->sc_pins[pin].pin_caps = in plgpio_attach()
69 sc->sc_pins[pin].pin_state = in plgpio_attach()
70 plgpio_pin_read(sc, pin); in plgpio_attach()
84 plgpio_pin_read(void *priv, int pin) in plgpio_pin_read() argument
88 const uint32_t v = PLGPIO_READ(sc, PL061_GPIODATA_REG(1<<pin)); in plgpio_pin_read()
90 return (v >> pin) & 1; in plgpio_pin_read()
[all …]
/netbsd-src/sys/dev/ppbus/
H A Dppbus_gpio.c81 gpio_pin_t *pin; in gpio_ppbus_attach() local
84 for (pin = &sc->sc_gpio_pins[0], i = 0; i < PPBUS_NPINS; pin++, i++) { in gpio_ppbus_attach()
85 pin->pin_num = i; in gpio_ppbus_attach()
88 pin->pin_caps = GPIO_PIN_INPUT; in gpio_ppbus_attach()
89 pin->pin_flags = GPIO_PIN_INPUT; in gpio_ppbus_attach()
90 pin->pin_state = gpio_ppbus_pin_read(sc, i); in gpio_ppbus_attach()
92 pin->pin_caps = GPIO_PIN_OUTPUT; in gpio_ppbus_attach()
93 pin->pin_flags = GPIO_PIN_OUTPUT; in gpio_ppbus_attach()
94 pin->pin_state = GPIO_PIN_LOW; in gpio_ppbus_attach()
95 gpio_ppbus_pin_write(sc, i, pin->pin_state); in gpio_ppbus_attach()
[all …]

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