Searched refs:performance_level_count (Results 1 – 12 of 12) sorted by relevance
813 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()830 ps->performance_levels[ps->performance_level_count - 1].mclk; in ni_apply_state_adjust_rules()832 ps->performance_levels[ps->performance_level_count - 1].vddci; in ni_apply_state_adjust_rules()839 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()850 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()856 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()861 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()869 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()874 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()878 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()[all …]
2314 if (state->performance_level_count == 0) in si_populate_power_containment_values()2317 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2328 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2396 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2399 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2420 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3035 for (i = ps->performance_level_count - 2; i >= 0; i--) { in si_apply_state_adjust_rules()3040 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3060 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3086 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in si_apply_state_adjust_rules()[all …]
175 u16 performance_level_count; member
49 u16 performance_level_count; member
834 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()845 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3762 if (state->performance_level_count < 1) in ci_trim_dpm_states()3765 if (state->performance_level_count == 1) in ci_trim_dpm_states()3867 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3869 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3908 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3909 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4810 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5488 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
2412 if (state->performance_level_count == 0) in si_populate_power_containment_values()2415 if (smc_state->levelCount != state->performance_level_count) in si_populate_power_containment_values()2426 for (i = 1; i < state->performance_level_count; i++) { in si_populate_power_containment_values()2493 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()2496 if (smc_state->levelCount != state->performance_level_count) in si_populate_sq_ramping_values()2517 for (i = 0; i < state->performance_level_count; i++) { in si_populate_sq_ramping_values()3188 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk >= in ni_set_uvd_clock_before_set_eng_clock()3189 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_before_set_eng_clock()3206 if (new_state->performance_levels[new_state->performance_level_count - 1].sclk < in ni_set_uvd_clock_after_set_eng_clock()3207 current_state->performance_levels[current_state->performance_level_count - 1].sclk) in ni_set_uvd_clock_after_set_eng_clock()[all …]
617 u16 performance_level_count; member
2913 PP_ASSERT_WITH_CODE(smu7_ps->performance_level_count == 2, in smu7_apply_state_adjust_rules()2923 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()2976 [smu7_ps->performance_level_count - 1].memory_clock; in smu7_apply_state_adjust_rules()3010 for (i = 0; i < smu7_ps->performance_level_count; i++) { in smu7_apply_state_adjust_rules()3040 [smu7_ps->performance_level_count-1].memory_clock; in smu7_dpm_get_mclk()3062 [smu7_ps->performance_level_count-1].engine_clock; in smu7_dpm_get_sclk()3176 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3179 …(smu7_power_state->performance_level_count < smum_get_mac_definition(hwmgr, SMU_MAX_LEVELS_GRAPHIC… in smu7_get_pp_table_entry_callback_func_v1()3184 (smu7_power_state->performance_level_count <= in smu7_get_pp_table_entry_callback_func_v1()3204 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()[all …]
3085 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3088 (vega10_power_state->performance_level_count < in vega10_get_pp_table_entry_callback_func()3094 (vega10_power_state->performance_level_count <= in vega10_get_pp_table_entry_callback_func()3109 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3196 if (vega10_ps->performance_level_count != 2) in vega10_apply_state_adjust_rules()3205 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3313 for (i = 0; i < vega10_ps->performance_level_count; i++) { in vega10_apply_state_adjust_rules()3331 [vega10_ps->performance_level_count - 1].gfx_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3334 [vega10_ps->performance_level_count - 1].mem_clock; in vega10_find_dpm_states_clocks_in_dpm_table()3453 PP_ASSERT_WITH_CODE((vega10_ps->performance_level_count >= 1), in vega10_trim_dpm_states()[all …]
84 uint16_t performance_level_count; member
111 uint16_t performance_level_count; member
128 uint16_t performance_level_count; member