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Searched refs:odn_memory_clock_dpm_levels (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Dsmu7_hwmgr.h186 struct phm_odn_clock_levels odn_memory_clock_dpm_levels; member
H A Dvega12_hwmgr.h294 struct phm_odn_clock_levels odn_memory_clock_dpm_levels; member
H A Dvega20_hwmgr.h356 struct phm_odn_clock_levels odn_memory_clock_dpm_levels; member
H A Damdgpu_smu7_hwmgr.c858 odn_table->odn_memory_clock_dpm_levels.num_of_pl = in smu7_odn_initial_default_setting()
860 entries = odn_table->odn_memory_clock_dpm_levels.entries; in smu7_odn_initial_default_setting()
924 if (odn_table->odn_memory_clock_dpm_levels.entries[i].clock != in smu7_check_dpm_table_updated()
3770 struct phm_odn_clock_levels *odn_mclk_table = &(odn_table->odn_memory_clock_dpm_levels); in smu7_populate_and_upload_sclk_mclk_dpm_levels()
4459 struct phm_odn_clock_levels *odn_mclk_table = &(odn_table->odn_memory_clock_dpm_levels); in smu7_print_clock_levels()
4885 podn_dpm_table_in_backend = &data->odn_dpm_table.odn_memory_clock_dpm_levels; in smu7_odn_edit_dpm_table()