Searched refs:new_active_crtcs (Results 1 – 10 of 10) sorted by relevance
1065 if (rdev->pm.dpm.new_active_crtcs != rdev->pm.dpm.current_active_crtcs) { in radeon_dpm_change_power_state_locked()1070 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()1079 if (rdev->pm.dpm.new_active_crtcs == in radeon_dpm_change_power_state_locked()1089 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()1135 rdev->pm.dpm.current_active_crtcs = rdev->pm.dpm.new_active_crtcs; in radeon_dpm_change_power_state_locked()1765 rdev->pm.dpm.new_active_crtcs = 0; in radeon_pm_compute_clocks_dpm()1772 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
1770 (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in cypress_program_display_gap()1773 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) in cypress_program_display_gap()
1190 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv6xx_program_display_gap()1193 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv6xx_program_display_gap()
1351 if (rdev->pm.dpm.new_active_crtcs & 1) { in rv770_program_display_gap()1354 } else if (rdev->pm.dpm.new_active_crtcs & 2) { in rv770_program_display_gap()
3707 (!(rdev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in si_program_display_gap()3710 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) in si_program_display_gap()5329 if (rdev->pm.dpm.new_active_crtcs & (1 << i)) { in si_upload_smc_data()
1602 u32 new_active_crtcs; member
398 u32 new_active_crtcs; member
129 adev->pm.dpm.new_active_crtcs = 0; in amdgpu_dpm_get_active_displays()136 adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id); in amdgpu_dpm_get_active_displays()
4174 (!(adev->pm.dpm.new_active_crtcs & (1 << pipe)))) { in si_program_display_gap()4177 if (adev->pm.dpm.new_active_crtcs & (1 << i)) in si_program_display_gap()5791 if (adev->pm.dpm.new_active_crtcs & (1 << i)) { in si_upload_smc_data()
3160 adev->pm.dpm.current_active_crtcs = adev->pm.dpm.new_active_crtcs; in amdgpu_dpm_change_power_state_locked()