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Searched refs:mm_boot_level_value (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_vegam_smumgr.c339 uint32_t mm_boot_level_offset, mm_boot_level_value; in vegam_update_uvd_smc_table() local
351 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_uvd_smc_table()
353 mm_boot_level_value &= 0x00FFFFFF; in vegam_update_uvd_smc_table()
354 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in vegam_update_uvd_smc_table()
356 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in vegam_update_uvd_smc_table()
371 uint32_t mm_boot_level_offset, mm_boot_level_value; in vegam_update_vce_smc_table() local
386 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in vegam_update_vce_smc_table()
388 mm_boot_level_value &= 0xFF00FFFF; in vegam_update_vce_smc_table()
389 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in vegam_update_vce_smc_table()
391 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in vegam_update_vce_smc_table()
H A Damdgpu_fiji_smumgr.c2373 uint32_t mm_boot_level_offset, mm_boot_level_value; in fiji_update_uvd_smc_table() local
2385 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_uvd_smc_table()
2387 mm_boot_level_value &= 0x00FFFFFF; in fiji_update_uvd_smc_table()
2388 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in fiji_update_uvd_smc_table()
2390 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in fiji_update_uvd_smc_table()
2405 uint32_t mm_boot_level_offset, mm_boot_level_value; in fiji_update_vce_smc_table() local
2420 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in fiji_update_vce_smc_table()
2422 mm_boot_level_value &= 0xFF00FFFF; in fiji_update_vce_smc_table()
2423 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in fiji_update_vce_smc_table()
2425 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in fiji_update_vce_smc_table()
H A Damdgpu_polaris10_smumgr.c2185 uint32_t mm_boot_level_offset, mm_boot_level_value; in polaris10_update_uvd_smc_table() local
2197 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_uvd_smc_table()
2199 mm_boot_level_value &= 0x00FFFFFF; in polaris10_update_uvd_smc_table()
2200 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in polaris10_update_uvd_smc_table()
2202 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in polaris10_update_uvd_smc_table()
2217 uint32_t mm_boot_level_offset, mm_boot_level_value; in polaris10_update_vce_smc_table() local
2232 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in polaris10_update_vce_smc_table()
2234 mm_boot_level_value &= 0xFF00FFFF; in polaris10_update_vce_smc_table()
2235 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in polaris10_update_vce_smc_table()
2237 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in polaris10_update_vce_smc_table()
H A Damdgpu_tonga_smumgr.c2684 uint32_t mm_boot_level_offset, mm_boot_level_value; in tonga_update_uvd_smc_table() local
2696 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_uvd_smc_table()
2698 mm_boot_level_value &= 0x00FFFFFF; in tonga_update_uvd_smc_table()
2699 mm_boot_level_value |= smu_data->smc_state_table.UvdBootLevel << 24; in tonga_update_uvd_smc_table()
2702 mm_boot_level_offset, mm_boot_level_value); in tonga_update_uvd_smc_table()
2718 uint32_t mm_boot_level_offset, mm_boot_level_value; in tonga_update_vce_smc_table() local
2730 mm_boot_level_value = cgs_read_ind_register(hwmgr->device, in tonga_update_vce_smc_table()
2732 mm_boot_level_value &= 0xFF00FFFF; in tonga_update_vce_smc_table()
2733 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in tonga_update_vce_smc_table()
2735 CGS_IND_REG__SMC, mm_boot_level_offset, mm_boot_level_value); in tonga_update_vce_smc_table()