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Searched refs:mmUVD_VCPU_NONCACHE_OFFSET1 (Results 1 – 2 of 2) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_5_offset.h727 #define mmUVD_VCPU_NONCACHE_OFFSET1 … macro
H A Dvcn_2_0_0_offset.h656 #define mmUVD_VCPU_NONCACHE_OFFSET1 … macro