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Searched refs:mmUVD_MIF_REF_UV_ADDR_CONFIG (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_offset.h89 #define mmUVD_MIF_REF_UV_ADDR_CONFIG … macro
H A Dvcn_2_5_offset.h837 #define mmUVD_MIF_REF_UV_ADDR_CONFIG … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_vcn_v1_0.c356 WREG32_SOC15(UVD, 0, mmUVD_MIF_REF_UV_ADDR_CONFIG, in vcn_v1_0_mc_resume_spg_mode()
432 WREG32_SOC15_DPG_MODE(UVD, 0, mmUVD_MIF_REF_UV_ADDR_CONFIG, in vcn_v1_0_mc_resume_dpg_mode()