Searched refs:mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW (Results 1 – 4 of 4) sorted by relevance
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_jpeg_v1_0.c | 63 reg = SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW); in jpeg_v1_0_decode_ring_set_patch_ring()
260 PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_emit_fence()
321 PACKETJ(SOC15_REG_OFFSET(JPEG, 0, mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW), 0, 0, PACKETJ_TYPE0)); in jpeg_v1_0_decode_ring_emit_ib()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/vcn/ |
| H A D | vcn_1_0_offset.h | 276 #define mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW … macro
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| H A D | vcn_2_5_offset.h | 275 #define mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW … macro
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| H A D | vcn_2_0_0_offset.h | 260 #define mmUVD_LMI_JRBC_RB_MEM_RD_64BIT_BAR_LOW … macro
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