Home
last modified time | relevance | path

Searched refs:mmRLC_SAVE_AND_RESTORE_BASE (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h1168 #define mmRLC_SAVE_AND_RESTORE_BASE 0x30C4 macro
H A Dgfx_7_0_d.h1262 #define mmRLC_SAVE_AND_RESTORE_BASE 0x30dd macro
H A Dgfx_7_2_d.h1275 #define mmRLC_SAVE_AND_RESTORE_BASE 0x30dd macro
H A Dgfx_8_0_d.h1369 #define mmRLC_SAVE_AND_RESTORE_BASE 0xec1d macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v6_0.c2832 WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); in gfx_v6_0_init_gfx_cgpg()
2940 WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); in gfx_v6_0_init_pg()
2948 WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); in gfx_v6_0_init_pg()
H A Damdgpu_gfx_v7_0.c3914 WREG32(mmRLC_SAVE_AND_RESTORE_BASE, adev->gfx.rlc.save_restore_gpu_addr >> 8); in gfx_v7_0_init_gfx_cgpg()