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Searched refs:mmMP1_SMN_C2PMSG_67_BASE_IDX (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn10/
H A Damdgpu_rv1_clk_mgr_vbios_smu.c58 #define mmMP1_SMN_C2PMSG_67_BASE_IDX 0 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h255 #define mmMP1_SMN_C2PMSG_67_BASE_IDX … macro
H A Dmp_12_0_0_offset.h255 #define mmMP1_SMN_C2PMSG_67_BASE_IDX … macro
H A Dmp_11_0_offset.h257 #define mmMP1_SMN_C2PMSG_67_BASE_IDX … macro
H A Dmp_9_0_offset.h267 #define mmMP1_SMN_C2PMSG_67_BASE_IDX 0 macro