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Searched refs:mmMP1_SMN_C2PMSG_102 (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_smu9_smumgr.c162 WREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_102, parameter); in smu9_send_msg_to_smc_with_parameter()
182 return RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_102); in smu9_get_argument()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mp/
H A Dmp_10_0_offset.h324 #define mmMP1_SMN_C2PMSG_102 … macro
H A Dmp_12_0_0_offset.h324 #define mmMP1_SMN_C2PMSG_102 … macro
H A Dmp_11_0_offset.h326 #define mmMP1_SMN_C2PMSG_102 … macro
H A Dmp_9_0_offset.h336 #define mmMP1_SMN_C2PMSG_102 0x02a6 macro