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Searched refs:mmDP6_DP_DPHY_TRAINING_PATTERN_SEL (Results 1 – 6 of 6) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_8_0_d.h3884 #define mmDP6_DP_DPHY_TRAINING_PATTERN_SEL 0x4ed1 macro
H A Ddce_11_0_d.h4496 #define mmDP6_DP_DPHY_TRAINING_PATTERN_SEL 0x54b0 macro
H A Ddce_10_0_d.h4516 #define mmDP6_DP_DPHY_TRAINING_PATTERN_SEL 0x54b0 macro
H A Ddce_11_2_d.h5728 #define mmDP6_DP_DPHY_TRAINING_PATTERN_SEL 0x54b0 macro
H A Ddce_12_0_offset.h11932 #define mmDP6_DP_DPHY_TRAINING_PATTERN_SEL … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h10241 #define mmDP6_DP_DPHY_TRAINING_PATTERN_SEL … macro