Home
last modified time | relevance | path

Searched refs:mmDP5_DP_VID_TIMING_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
H A Ddcn_1_0_offset.h9916 #define mmDP5_DP_VID_TIMING_BASE_IDX … macro
H A Ddcn_2_0_0_offset.h12603 #define mmDP5_DP_VID_TIMING_BASE_IDX … macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h11633 #define mmDP5_DP_VID_TIMING_BASE_IDX … macro