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Searched refs:mmCP_ME_RAM_DATA (Results 1 – 12 of 12) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_d.h462 #define mmCP_ME_RAM_DATA 0x3058 macro
H A Dgfx_7_0_d.h246 #define mmCP_ME_RAM_DATA 0x3058 macro
H A Dgfx_7_2_d.h248 #define mmCP_ME_RAM_DATA 0x3058 macro
H A Dgfx_8_0_d.h277 #define mmCP_ME_RAM_DATA 0xf817 macro
H A Dgfx_8_1_d.h278 #define mmCP_ME_RAM_DATA 0xf817 macro
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Damdgpu_gfx_v6_0.c2019 WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++)); in gfx_v6_0_cp_gfx_load_microcode()
H A Damdgpu_gfx_v7_0.c2516 WREG32(mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++)); in gfx_v7_0_cp_gfx_load_microcode()
H A Damdgpu_gfx_v9_0.c3108 WREG32_SOC15(GC, 0, mmCP_ME_RAM_DATA, le32_to_cpup(fw_data++)); in gfx_v9_0_cp_gfx_load_microcode()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_offset.h6728 #define mmCP_ME_RAM_DATA … macro
H A Dgc_9_1_offset.h6952 #define mmCP_ME_RAM_DATA … macro
H A Dgc_9_2_1_offset.h6980 #define mmCP_ME_RAM_DATA … macro
H A Dgc_10_1_0_offset.h10220 #define mmCP_ME_RAM_DATA … macro