Searched refs:mmATC_L2_CACHE_4K_EDC_INDEX (Results 1 – 2 of 2) sorted by relevance
| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx_v9_0.c | 6210 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255); in gfx_v9_0_query_utc_edc_status()
6266 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, i); in gfx_v9_0_query_utc_edc_status()
6287 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255); in gfx_v9_0_query_utc_edc_status()
6354 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255); in gfx_v9_0_clear_ras_edc_counter()
6373 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, i); in gfx_v9_0_clear_ras_edc_counter()
6380 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_INDEX, 255); in gfx_v9_0_clear_ras_edc_counter()
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| /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/ |
| H A D | gc_9_0_offset.h | 1151 #define mmATC_L2_CACHE_4K_EDC_INDEX … macro
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