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Searched refs:min_clock_in_sr (Results 1 – 13 of 13) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
H A Dsmu7_hwmgr.h159 uint32_t min_clock_in_sr; member
H A Dvega12_hwmgr.h149 uint32_t min_clock_in_sr; member
H A Dvega10_hwmgr.h170 uint32_t min_clock_in_sr; member
H A Dvega20_hwmgr.h202 uint32_t min_clock_in_sr; member
H A Damdgpu_smu7_hwmgr.c3629 if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR && in smu7_find_dpm_states_clocks_in_dpm_table()
3631 data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK)) in smu7_find_dpm_states_clocks_in_dpm_table()
4188 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr && in smu7_check_smc_update_required_for_display_configuration()
4189 (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK || in smu7_check_smc_update_required_for_display_configuration()
H A Damdgpu_vega12_hwmgr.c2447 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega12_check_smc_update_required_for_display_configuration()
H A Damdgpu_vega20_hwmgr.c3827 (data->display_timing.min_clock_in_sr != in vega20_check_smc_update_required_for_display_configuration()
H A Damdgpu_vega10_hwmgr.c4759 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega10_check_smc_update_required_for_display_configuration()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_iceland_smumgr.c936 data->display_timing.min_clock_in_sr = in iceland_populate_single_graphic_level()
943 data->display_timing.min_clock_in_sr); in iceland_populate_single_graphic_level()
H A Damdgpu_tonga_smumgr.c663 data->display_timing.min_clock_in_sr = in tonga_populate_single_graphic_level()
670 data->display_timing.min_clock_in_sr); in tonga_populate_single_graphic_level()
H A Damdgpu_vegam_smumgr.c841 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
H A Damdgpu_fiji_smumgr.c981 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
H A Damdgpu_polaris10_smumgr.c949 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in polaris10_populate_single_graphic_level()