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Searched refs:mclk_array (Results 1 – 4 of 4) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
H A Damdgpu_fiji_smumgr.c2563 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in fiji_update_dpm_settings() local
2618 clk_activity_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2630 up_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
2632 down_hyst_offset = mclk_array + (sizeof(SMU73_Discrete_MemoryLevel) * i) in fiji_update_dpm_settings()
H A Damdgpu_polaris10_smumgr.c2479 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in polaris10_update_dpm_settings() local
2534 clk_activity_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2546 up_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
2548 down_hyst_offset = mclk_array + (sizeof(SMU74_Discrete_MemoryLevel) * i) in polaris10_update_dpm_settings()
H A Damdgpu_ci_smumgr.c2774 uint32_t mclk_array = smu_data->dpm_table_start + in ci_update_dpm_settings() local
2829 clk_activity_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2841 up_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
2843 down_hyst_offset = mclk_array + (sizeof(SMU7_Discrete_MemoryLevel) * i) in ci_update_dpm_settings()
H A Damdgpu_tonga_smumgr.c3162 uint32_t mclk_array = smu_data->smu7_data.dpm_table_start + in tonga_update_dpm_settings() local
3217 clk_activity_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3229 up_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()
3231 down_hyst_offset = mclk_array + (sizeof(SMU72_Discrete_MemoryLevel) * i) in tonga_update_dpm_settings()