Searched refs:materializePtrAdd (Results 1 – 6 of 6) sorted by relevance
| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | CallLowering.cpp | 787 MIRBuilder.materializePtrAdd(Addr, DemoteReg, OffsetLLTy, Offsets[I]); in insertSRetLoads()
818 MIRBuilder.materializePtrAdd(Addr, DemoteReg, OffsetLLTy, Offsets[I]); in insertSRetStores()
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| H A D | MachineIRBuilder.cpp | 193 MachineIRBuilder::materializePtrAdd(Register &Res, Register Op0, in materializePtrAdd() function in MachineIRBuilder
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| H A D | IRTranslator.cpp | 1292 MIRBuilder.materializePtrAdd(Addr, Base, OffsetTy, Offsets[i] / 8); in translateLoad()
1334 MIRBuilder.materializePtrAdd(Addr, Base, OffsetTy, Offsets[i] / 8); in translateStore()
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| H A D | LegalizerHelper.cpp | 3913 MIRBuilder.materializePtrAdd(NewAddrReg, AddrReg, OffsetTy, ByteOffset); in reduceLoadStoreWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 482 Optional<MachineInstrBuilder> materializePtrAdd(Register &Res, Register Op0,
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 1786 B.materializePtrAdd(LoadAddr, QueuePtr, LLT::scalar(64), StructOffset); in getSegmentAperture()
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