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Searched refs:isAllocatable (Results 1 – 25 of 37) sorted by relevance

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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DSIRegisterInfo.td302 let isAllocatable = 0;
307 let isAllocatable = 0;
313 let isAllocatable = 0;
327 let isAllocatable = 0;
368 let isAllocatable = 0;
374 let isAllocatable = 0;
522 let isAllocatable = 0;
565 let isAllocatable = 0;
571 let isAllocatable = 0;
577 let isAllocatable = 0;
[all …]
H A DR600RegisterInfo.td163 let isAllocatable = 0 in {
209 } // End isAllocatable = 0
H A DGCNNSAReassign.cpp128 if (!MRI->isAllocatable(Reg)) in canAssign()
H A DSIFrameLowering.cpp221 if (LiveRegs.available(MRI, Reg) && MRI.isAllocatable(Reg) && in emitEntryFunctionFlatScratchInit()
374 if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) && in getEntryFunctionReservedScratchRsrcReg()
470 if (!MRI.isPhysRegUsed(Reg) && MRI.isAllocatable(Reg) && in emitEntryFunctionPrologue()
H A DSIMachineFunctionInfo.cpp410 return MRI.isAllocatable(Reg) && !MRI.isPhysRegUsed(Reg) && in allocateVGPRSpillToAGPR()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp195 if (!RC || RC->isAllocatable()) in getAllocatableClass()
201 if (SubRC->isAllocatable()) in getAllocatableClass()
249 assert(RC->isAllocatable() && "invalid for nonallocatable sets"); in getAllocatableSetForRC()
265 if (C->isAllocatable()) in getAllocatableSet()
H A DMachineRegisterInfo.cpp59 assert(RC && RC->isAllocatable() && "Invalid RC for virtual register"); in setRegClass()
161 assert(RegClass->isAllocatable() && in createVirtualRegister()
524 if (!def_empty(*AI) || isAllocatable(*AI)) in isConstantPhysReg()
H A DCalcSpillWeights.cpp275 if (HintReg.isVirtual() || MRI.isAllocatable(HintReg)) in weightCalcHelper()
H A DAggressiveAntiDepBreaker.cpp642 if (!MRI.isAllocatable(NewSuperReg)) continue; in FindSuitableFreeRegisters()
853 if (!MRI.isAllocatable(AntiDepReg)) { in BreakAntiDependencies()
H A DCriticalAntiDepBreaker.cpp566 if (!MRI.isAllocatable(AntiDepReg)) in BreakAntiDependencies()
H A DRegisterPressure.cpp524 } else if (MRI.isAllocatable(Reg)) { in pushReg()
560 } else if (MRI.isAllocatable(Reg)) { in pushRegLanes()
H A DRegAllocFast.cpp740 if (Hint0.isPhysical() && MRI->isAllocatable(Hint0) && RC.contains(Hint0) && in allocVirtReg()
759 if (Hint1.isPhysical() && MRI->isAllocatable(Hint1) && RC.contains(Hint1) && in allocVirtReg()
H A DMachineCSE.cpp345 if (MRI->isAllocatable(PhysDefs[i].second) || in PhysRegDefsReach()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.td397 let Size = 32, isAllocatable = 0 in
408 let isAllocatable = 0 in
411 let Size = 64, isAllocatable = 0 in
416 let Size = 32, isAllocatable = 0 in
426 let Size = 64, isAllocatable = 0 in
437 let isAllocatable = 0 in
443 let Size = 32, isAllocatable = 0 in
H A DHexagonBlockRanges.cpp225 if (RC->isAllocatable()) in HexagonBlockRanges()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86RegisterInfo.td411 let isAllocatable = 0 in
420 let isAllocatable = 0 in
554 let isAllocatable = 0;
561 let isAllocatable = 0;
578 let isAllocatable = 0;
582 let isAllocatable = 0;
586 let isAllocatable = 0;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.td57 let isAllocatable = 0;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
H A DLanaiRegisterInfo.td62 let isAllocatable = 0;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td43 let isAllocatable = allocatable in
321 let isAllocatable = 0, CopyCost = -1 in
328 let isAllocatable = 0 in
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCRegisterInfo.td406 let isAllocatable = 0;
409 let isAllocatable = 0;
413 let isAllocatable = 0;
416 let isAllocatable = 0;
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h115 bool isAllocatable() const { return MC->isAllocatable(); } in isAllocatable() function
H A DMachineRegisterInfo.h933 bool isAllocatable(MCRegister PhysReg) const { in isAllocatable() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kRegisterInfo.td111 let isAllocatable = 0 in {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMRegisterInfo.td280 let isAllocatable = 0;
331 let isAllocatable = 0;
382 let isAllocatable = 0;
448 let isAllocatable = 0;
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/
H A DMCRegisterInfo.h95 bool isAllocatable() const { return Allocatable; } in isAllocatable() function

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