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Searched refs:iops (Results 1 – 22 of 22) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
H A DARMInstrFormats.td465 class AsmPseudoInst<string asm, dag iops, dag oops = (outs)>
469 let InOperandList = iops;
477 class ARMAsmPseudo<string asm, dag iops, dag oops = (outs)>
478 : AsmPseudoInst<asm, iops, oops>, Requires<[IsARM]>;
479 class tAsmPseudo<string asm, dag iops, dag oops = (outs)>
480 : AsmPseudoInst<asm, iops, oops>, Requires<[IsThumb]>;
481 class t2AsmPseudo<string asm, dag iops, dag oops = (outs)>
482 : AsmPseudoInst<asm, iops, oops>, Requires<[IsThumb2]>;
483 class VFP2AsmPseudo<string asm, dag iops, dag oops = (outs)>
484 : AsmPseudoInst<asm, iops, oops>, Requires<[HasVFP2]>;
[all …]
H A DARMInstrCDE.td52 class CDE_Instr<bit acc, dag oops, dag iops, string asm, string cstr>
53 : Thumb2XI<oops, !con((ins p_imm:$coproc), iops),
70 class CDE_GPR_Instr<bit dual, bit acc, dag oops, dag iops,
72 : CDE_Instr<acc, oops, iops, asm, cstr>,
252 class CDE_FP_Vec_Instr<bit vec, bit acc, dag oops, dag iops, string asm, string cstr>
253 : CDE_Instr<acc, oops, iops, asm, cstr> {
259 class CDE_FP_Instr<bit acc, bit sz, dag oops, dag iops, string asm, string cstr>
260 : CDE_FP_Vec_Instr<0b0, acc, oops, iops, asm, cstr> {
265 class CDE_Vec_Instr<bit acc, dag oops, dag iops, string asm, string cstr,
268 !con(iops, (ins vpred:$vp)), asm,
H A DARMInstrThumb2.td442 class T2OneRegImm<dag oops, dag iops, InstrItinClass itin,
444 : T2I<oops, iops, itin, opc, asm, pattern> {
455 class T2sOneRegImm<dag oops, dag iops, InstrItinClass itin,
457 : T2sI<oops, iops, itin, opc, asm, pattern> {
468 class T2OneRegCmpImm<dag oops, dag iops, InstrItinClass itin,
470 : T2I<oops, iops, itin, opc, asm, pattern> {
481 class T2OneRegShiftedReg<dag oops, dag iops, InstrItinClass itin,
483 : T2I<oops, iops, itin, opc, asm, pattern> {
494 class T2sOneRegShiftedReg<dag oops, dag iops, InstrItinClass itin,
496 : T2sI<oops, iops, itin, opc, asm, pattern> {
[all …]
H A DARMInstrVFP.td1381 bits<4> opcod4, dag oops, dag iops,
1384 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1401 bits<4> opcod4, dag oops, dag iops,InstrItinClass itin,
1403 : AVConv1In<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1419 bits<4> opcod4, dag oops, dag iops,
1422 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1533 bits<4> opcod4, dag oops, dag iops,
1536 : AVConv1I<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
1553 bits<4> opcod4, dag oops, dag iops,
1556 : AVConv1In<opcod1, opcod2, opcod3, opcod4, oops, iops, itin, opc, asm,
[all …]
H A DARMInstrMVE.td395 class MVE_MI<dag oops, dag iops, InstrItinClass itin, string asm,
397 : Thumb2XI<oops, iops, AddrModeNone, 4, itin, !strconcat(asm, "\t", ops), cstr,
407 class MVE_p<dag oops, dag iops, InstrItinClass itin, string iname,
410 : MVE_MI<oops, !con(iops, (ins vpred:$vp)), itin,
421 class MVE_f<dag oops, dag iops, InstrItinClass itin, string iname,
424 : MVE_p<oops, iops, itin, iname, suffix, ops, vpred, cstr, pattern> {
428 class MVE_MI_with_pred<dag oops, dag iops, InstrItinClass itin, string asm,
430 : Thumb2I<oops, iops, AddrModeNone, 4, itin, asm, !strconcat("\t", ops), cstr,
437 class MVE_VMOV_lane_base<dag oops, dag iops, InstrItinClass itin, string asm,
440 : Thumb2I<oops, iops, AddrModeNone, 4, itin, asm,
[all …]
H A DARMInstrThumb.td896 class T1pIDPEncode<bits<4> opA, dag oops, dag iops, InstrItinClass itin,
898 : T1pI<oops, iops, itin, opc, asm, pattern>,
905 class T1pIMiscEncode<bits<7> opA, dag oops, dag iops, InstrItinClass itin,
907 : T1pI<oops, iops, itin, opc, asm, pattern>,
916 class T1sIDPEncode<bits<4> opA, dag oops, dag iops, InstrItinClass itin,
918 : T1sI<oops, iops, itin, opc, asm, pattern>,
925 class T1sIGenEncode<bits<5> opA, dag oops, dag iops, InstrItinClass itin,
927 : T1sI<oops, iops, itin, opc, asm, pattern>,
936 class T1sIGenEncodeImm<bits<5> opA, dag oops, dag iops, InstrItinClass itin,
938 : T1sI<oops, iops, itin, opc, asm, pattern>,
[all …]
H A DARMInstrInfo.td2224 class CPS<dag iops, string asm_ops>
2225 : AXI<(outs), iops, MiscFrm, NoItinerary, !strconcat("cps", asm_ops),
3891 dag iops = (ins GPRnopc:$Rn, GPRnopc:$Rm),
3893 : AI<(outs GPRnopc:$Rd), iops, DPFrm, IIC_iALUr, opc, asm, pattern>,
4237 class AsMul1I32<bits<7> opcod, dag oops, dag iops, InstrItinClass itin,
4239 : AsMul1I<opcod, oops, iops, itin, opc, asm, pattern> {
4247 class AsMul1I64<bits<7> opcod, dag oops, dag iops, InstrItinClass itin,
4249 : AsMul1I<opcod, oops, iops, itin, opc, asm, pattern> {
4259 class AsMla1I64<bits<7> opcod, dag oops, dag iops, InstrItinClass itin,
4261 : AsMul1I<opcod, oops, iops, itin, opc, asm, pattern> {
[all …]
H A DARMInstrNEON.td4909 InstrItinClass itin, dag oops, dag iops,
4912 iops, itin, opc, dt, "$Vd, $Vn, $Vm, $rot", "$src1 = $Vd", pattern>{
4918 InstrItinClass itin, dag oops, dag iops, string opc,
4921 iops, itin, opc, dt, "$Vd, $Vn, $Vm, $rot", "", pattern> {
4927 dag oops, dag iops, string opc, string dt,
4929 : N3VLaneCP8<s, {?,?}, q, op4, oops, iops, itin, opc, dt,
4939 dag oops, dag iops, string opc, string dt,
4941 : N3VLaneCP8<s, {?,?}, q, op4, oops, iops, itin, opc, dt,
9067 dag oops, dag iops, list<dag> pattern>
9068 : N3Vnp<op27_23, op21_20, 0b1101, op6, 0, oops, iops,
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyInstrFormats.td33 class NI<dag oops, dag iops, list<dag> pattern, string stack,
37 dag InOperandList = iops;
43 // We have 2 sets of operands (oops & iops) for the register and stack
65 multiclass NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
67 defm "": I<oops, iops, oops, iops, pattern, asmstr, asmstr, inst>;
H A DWebAssemblyInstrAtomics.td24 multiclass ATOMIC_NRI<dag oops, dag iops, list<dag> pattern, string asmstr = "",
26 defm "" : NRI<oops, iops, pattern, asmstr,
/netbsd-src/sbin/nvmectl/
H A Dperftest.c59 uint64_t io_completed = 0, iops, mbps; in print_perftest() local
65 iops = io_completed/io_test->time; in print_perftest()
66 mbps = iops * io_test->size / (1024*1024); in print_perftest()
71 io_test->time, (uintmax_t)iops, (uintmax_t)mbps); in print_perftest()
/netbsd-src/bin/ksh/
H A Dsyn.c214 struct ioword *iop, **iops; local
218 iops = (struct ioword **) alloc(sizeofN(struct ioword *, NUFILE+1),
227 afree((void*) iops, ATEMP);
245 iops[iopn++] = synio(cf);
399 iops[iopn++] = iop;
403 afree((void*) iops, ATEMP);
406 iops[iopn++] = NULL;
407 iops = (struct ioword **) aresize((void*) iops,
409 t->ioact = iops;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
H A DPPCScheduleP9.td35 // As iops are dispatched to a slice, they are held in an independent slice
60 // of the superslice, but are restricted to iops with only two primary sources.
135 // Vector ('V') - vector iops (128-bit operand) take only one decode and
150 // Paired ('P') - certain cracked and expanded iops are paired such that they
156 // Tuple Restricted ('R') - certain iops preclude dispatching more than one
162 // Each execution and branch slice can receive up to two iops per cycle
H A DPPCInstrInfo.td4649 class PPCAsmPseudo<string asm, dag iops>
4655 let InOperandList = iops;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64InstrFormats.td83 class Pseudo<dag oops, dag iops, list<dag> pattern, string cstr = "">
86 dag InOperandList = iops;
99 class I<dag oops, dag iops, string asm, string operands, string cstr,
103 dag InOperandList = iops;
1310 class BaseSystemI<bit L, dag oops, dag iops, string asm, string operands,
1312 : I<oops, iops, asm, operands, "", pattern> {
1318 class SimpleSystemI<bit L, dag iops, string asm, string operands,
1320 : BaseSystemI<L, (outs), iops, asm, operands, pattern> {
1325 class RtSystemI<bit L, dag oops, dag iops, string asm, string operands,
1327 : BaseSystemI<L, oops, iops, asm, operands, pattern>,
[all …]
H A DSVEInstrFormats.td4258 ZPRRegOp zprty, string pred_qual, dag iops>
4259 : I<(outs zprty:$Zd), iops,
6520 class sve_mem_cld_ss_base<bits<4> dtype, bit ff, dag iops, string asm,
6522 : I<(outs VecList:$Zt), iops,
6941 class sve2_mem_gldnt_vs_base<bits<5> opc, dag iops, string asm,
6943 : I<(outs VecList:$Zt), iops,
7440 ZPRRegOp zprty, string pg_suffix, dag iops>
7441 : I<(outs zprty:$Zd), iops,
7550 class sve_int_break<bits<3> opc, string asm, string suffix, dag iops>
7551 : I<(outs PPR8:$Pd), iops,
[all …]
/netbsd-src/external/gpl3/gcc/dist/gcc/config/rs6000/
H A Dpower9.md43 ; Power9 can dispatch a maximum of 6 iops per cycle with the following
45 ; 1) At most 2 iops per execution slice
46 ; 2) At most 2 iops to the branch unit
H A Dpower10.md57 ; Power10 can dispatch a maximum of 8 iops per cycle. With a maximum of
/netbsd-src/external/gpl3/gcc.old/dist/gcc/config/rs6000/
H A Dpower9.md43 ; Power9 can dispatch a maximum of 6 iops per cycle with the following
45 ; 1) At most 2 iops per execution slice
46 ; 2) At most 2 iops to the branch unit
H A Dpower10.md48 ; The processor can dispatch a maximum of 6 iops per cycle with the following
50 ; 1) At most 2 iops per execution slice
51 ; 2) At most 2 iops to the branch unit
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonPseudo.td201 class Call_nr<bits<5> nbits, bit isPred, bit isFalse, dag iops,
203 : Pseudo<(outs), iops, "">, PredRel {
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86InstrFormats.td387 class PseudoI<dag oops, dag iops, list<dag> pattern>
388 : X86Inst<0, Pseudo, NoImm, oops, iops, ""> {