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/netbsd-src/external/bsd/tmux/dist/
H A Dgrid-reader.c24 grid_reader_start(struct grid_reader *gr, struct grid *gd, u_int cx, u_int cy) in grid_reader_start() argument
26 gr->gd = gd; in grid_reader_start()
27 gr->cx = cx; in grid_reader_start()
28 gr->cy = cy; in grid_reader_start()
33 grid_reader_get_cursor(struct grid_reader *gr, u_int *cx, u_int *cy) in grid_reader_get_cursor() argument
35 *cx = gr->cx; in grid_reader_get_cursor()
36 *cy = gr->cy; in grid_reader_get_cursor()
41 grid_reader_line_length(struct grid_reader *gr) in grid_reader_line_length() argument
43 return (grid_line_length(gr->gd, gr->cy)); in grid_reader_line_length()
48 grid_reader_cursor_right(struct grid_reader *gr, int wrap, int all) in grid_reader_cursor_right() argument
[all …]
/netbsd-src/sys/arch/hppa/hppa/
H A Dhppa_machdep.c62 __greg_t *gr = mcp->__gregs; in cpu_getmcontext() local
65 gr[0] = tf->tf_ipsw; in cpu_getmcontext()
66 gr[1] = tf->tf_r1; in cpu_getmcontext()
67 gr[2] = tf->tf_rp; in cpu_getmcontext()
68 gr[3] = tf->tf_r3; in cpu_getmcontext()
69 gr[4] = tf->tf_r4; in cpu_getmcontext()
70 gr[5] = tf->tf_r5; in cpu_getmcontext()
71 gr[6] = tf->tf_r6; in cpu_getmcontext()
72 gr[7] = tf->tf_r7; in cpu_getmcontext()
73 gr[8] = tf->tf_r8; in cpu_getmcontext()
[all …]
/netbsd-src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/gr/
H A Dnouveau_nvkm_engine_gr_base.c36 struct nvkm_gr *gr = device->gr; in nvkm_gr_ctxsw_inst() local
37 if (gr && gr->func->ctxsw.inst) in nvkm_gr_ctxsw_inst()
38 return gr->func->ctxsw.inst(gr); in nvkm_gr_ctxsw_inst()
45 struct nvkm_gr *gr = device->gr; in nvkm_gr_ctxsw_resume() local
46 if (gr && gr->func->ctxsw.resume) in nvkm_gr_ctxsw_resume()
47 return gr->func->ctxsw.resume(gr); in nvkm_gr_ctxsw_resume()
54 struct nvkm_gr *gr = device->gr; in nvkm_gr_ctxsw_pause() local
55 if (gr && gr->func->ctxsw.pause) in nvkm_gr_ctxsw_pause()
56 return gr->func->ctxsw.pause(gr); in nvkm_gr_ctxsw_pause()
63 struct nvkm_gr *gr = nvkm_gr(engine); in nvkm_gr_chsw_load() local
[all …]
H A Dnouveau_nvkm_engine_gr_gf100.c56 gf100_gr_zbc_clear_color(struct gf100_gr *gr, int zbc) in gf100_gr_zbc_clear_color() argument
58 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_gr_zbc_clear_color()
59 if (gr->zbc_color[zbc].format) { in gf100_gr_zbc_clear_color()
60 nvkm_wr32(device, 0x405804, gr->zbc_color[zbc].ds[0]); in gf100_gr_zbc_clear_color()
61 nvkm_wr32(device, 0x405808, gr->zbc_color[zbc].ds[1]); in gf100_gr_zbc_clear_color()
62 nvkm_wr32(device, 0x40580c, gr->zbc_color[zbc].ds[2]); in gf100_gr_zbc_clear_color()
63 nvkm_wr32(device, 0x405810, gr->zbc_color[zbc].ds[3]); in gf100_gr_zbc_clear_color()
65 nvkm_wr32(device, 0x405814, gr->zbc_color[zbc].format); in gf100_gr_zbc_clear_color()
71 gf100_gr_zbc_color_get(struct gf100_gr *gr, int format, in gf100_gr_zbc_color_get() argument
74 struct nvkm_ltc *ltc = gr->base.engine.subdev.device->ltc; in gf100_gr_zbc_color_get()
[all …]
H A DKbuild2 nvkm-y += nvkm/engine/gr/base.o
3 nvkm-y += nvkm/engine/gr/nv04.o
4 nvkm-y += nvkm/engine/gr/nv10.o
5 nvkm-y += nvkm/engine/gr/nv15.o
6 nvkm-y += nvkm/engine/gr/nv17.o
7 nvkm-y += nvkm/engine/gr/nv20.o
8 nvkm-y += nvkm/engine/gr/nv25.o
9 nvkm-y += nvkm/engine/gr/nv2a.o
10 nvkm-y += nvkm/engine/gr/nv30.o
11 nvkm-y += nvkm/engine/gr/nv34.o
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H A Dnouveau_nvkm_engine_gr_ctxgf100.c1017 struct nvkm_device *device = info->gr->base.engine.subdev.device; in gf100_grctx_mmio_item()
1038 gf100_grctx_generate_r419cb8(struct gf100_gr *gr) in gf100_grctx_generate_r419cb8() argument
1040 struct nvkm_device *device = gr->base.engine.subdev.device; in gf100_grctx_generate_r419cb8()
1047 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gf100_grctx_generate_bundle()
1059 const struct gf100_grctx_func *grctx = info->gr->func->grctx; in gf100_grctx_generate_pagepool()
1071 struct gf100_gr *gr = info->gr; in gf100_grctx_generate_attrib() local
1072 const struct gf100_grctx_func *grctx = gr->func->grctx; in gf100_grctx_generate_attrib()
1076 const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), false); in gf100_grctx_generate_attrib()
1084 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf100_grctx_generate_attrib()
1085 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) { in gf100_grctx_generate_attrib()
[all …]
H A Dnouveau_nvkm_engine_gr_gk20a.c42 gk20a_gr_av_to_init(struct gf100_gr *gr, const char *path, const char *name, in gk20a_gr_av_to_init() argument
45 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gk20a_gr_av_to_init()
92 gk20a_gr_aiv_to_init(struct gf100_gr *gr, const char *path, const char *name, in gk20a_gr_aiv_to_init() argument
95 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gk20a_gr_aiv_to_init()
135 gk20a_gr_av_to_method(struct gf100_gr *gr, const char *path, const char *name, in gk20a_gr_av_to_method() argument
138 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gk20a_gr_av_to_method()
196 gk20a_gr_wait_mem_scrubbing(struct gf100_gr *gr) in gk20a_gr_wait_mem_scrubbing() argument
198 struct nvkm_subdev *subdev = &gr->base.engine.subdev; in gk20a_gr_wait_mem_scrubbing()
221 gk20a_gr_set_hww_esr_report_mask(struct gf100_gr *gr) in gk20a_gr_set_hww_esr_report_mask() argument
223 struct nvkm_device *device = gr->base.engine.subdev.device; in gk20a_gr_set_hww_esr_report_mask()
[all …]
H A Dnouveau_nvkm_engine_gr_nv10.c406 struct nv10_gr *gr; member
419 #define PIPE_SAVE(gr, state, addr) \ argument
427 #define PIPE_RESTORE(gr, state, addr) \ argument
439 struct nvkm_gr *gr = &chan->gr->base; in nv17_gr_mthd_lma_window() local
450 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
457 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
467 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
490 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
505 nv04_gr_idle(gr); in nv17_gr_mthd_lma_window()
512 struct nvkm_gr *gr = &chan->gr->base; in nv17_gr_mthd_lma_enable() local
[all …]
H A Dnouveau_nvkm_engine_gr_gm200.c91 gm200_gr_rops(struct gf100_gr *gr) in gm200_gr_rops() argument
93 return nvkm_rd32(gr->base.engine.subdev.device, 0x12006c); in gm200_gr_rops()
97 gm200_gr_init_ds_hww_esr_2(struct gf100_gr *gr) in gm200_gr_init_ds_hww_esr_2() argument
99 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_gr_init_ds_hww_esr_2()
105 gm200_gr_init_num_active_ltcs(struct gf100_gr *gr) in gm200_gr_init_num_active_ltcs() argument
107 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_gr_init_num_active_ltcs()
113 gm200_gr_init_gpc_mmu(struct gf100_gr *gr) in gm200_gr_init_gpc_mmu() argument
115 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_gr_init_gpc_mmu()
127 gm200_gr_init_rop_active_fbps(struct gf100_gr *gr) in gm200_gr_init_rop_active_fbps() argument
129 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_gr_init_rop_active_fbps()
[all …]
H A Dnouveau_nvkm_engine_gr_ctxgv100.c69 struct gf100_gr *gr = info->gr; in gv100_grctx_generate_attrib() local
70 const struct gf100_grctx_func *grctx = gr->func->grctx; in gv100_grctx_generate_attrib()
75 u32 size = grctx->alpha_nr_max * gr->tpc_total; in gv100_grctx_generate_attrib()
80 for (gpc = 0; gpc < gr->gpc_nr; gpc++) in gv100_grctx_generate_attrib()
81 size += grctx->gfxp_nr * gr->ppc_nr[gpc] * gr->ppc_tpc_max; in gv100_grctx_generate_attrib()
93 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gv100_grctx_generate_attrib()
94 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gv100_grctx_generate_attrib()
95 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
96 const u32 bs = attrib * gr->ppc_tpc_max; in gv100_grctx_generate_attrib()
97 const u32 gs = gfxp * gr->ppc_tpc_max; in gv100_grctx_generate_attrib()
[all …]
H A Dnouveau_nvkm_engine_gr_ctxgm200.c36 gm200_grctx_generate_r419a3c(struct gf100_gr *gr) in gm200_grctx_generate_r419a3c() argument
38 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_grctx_generate_r419a3c()
43 gm200_grctx_generate_r418e94(struct gf100_gr *gr) in gm200_grctx_generate_r418e94() argument
45 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_grctx_generate_r418e94()
51 gm200_grctx_generate_smid_config(struct gf100_gr *gr) in gm200_grctx_generate_smid_config() argument
53 struct nvkm_device *device = gr->base.engine.subdev.device; in gm200_grctx_generate_smid_config()
54 const u32 dist_nr = DIV_ROUND_UP(gr->tpc_total, 4); in gm200_grctx_generate_smid_config()
59 for (sm = 0; sm < gr->sm_nr; sm++) { in gm200_grctx_generate_smid_config()
60 const u8 gpc = gr->sm[sm].gpc; in gm200_grctx_generate_smid_config()
61 const u8 tpc = gr->sm[sm].tpc; in gm200_grctx_generate_smid_config()
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H A Dnouveau_nvkm_engine_gr_ctxgm20b.c30 gm20b_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) in gm20b_grctx_generate_main() argument
32 struct nvkm_device *device = gr->base.engine.subdev.device; in gm20b_grctx_generate_main()
33 const struct gf100_grctx_func *grctx = gr->func->grctx; in gm20b_grctx_generate_main()
37 gf100_gr_mmio(gr, gr->sw_ctx); in gm20b_grctx_generate_main()
39 gf100_gr_wait_idle(gr); in gm20b_grctx_generate_main()
45 grctx->unkn(gr); in gm20b_grctx_generate_main()
47 gf100_grctx_generate_floorsweep(gr); in gm20b_grctx_generate_main()
52 nvkm_wr32(device, 0x405b00, (gr->tpc_total << 8) | gr->gpc_nr); in gm20b_grctx_generate_main()
56 for (tmp = 0, i = 0; i < gr->gpc_nr; i++) in gm20b_grctx_generate_main()
57 tmp |= ((1 << gr->tpc_nr[i]) - 1) << (i * 4); in gm20b_grctx_generate_main()
[all …]
H A Dnouveau_nvkm_engine_gr_ctxgk20a.c33 gk20a_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info) in gk20a_grctx_generate_main() argument
35 struct nvkm_device *device = gr->base.engine.subdev.device; in gk20a_grctx_generate_main()
36 const struct gf100_grctx_func *grctx = gr->func->grctx; in gk20a_grctx_generate_main()
40 gf100_gr_mmio(gr, gr->sw_ctx); in gk20a_grctx_generate_main()
42 gf100_gr_wait_idle(gr); in gk20a_grctx_generate_main()
48 grctx->unkn(gr); in gk20a_grctx_generate_main()
50 gf100_grctx_generate_floorsweep(gr); in gk20a_grctx_generate_main()
55 nvkm_wr32(device, 0x405b00, (gr->tpc_total << 8) | gr->gpc_nr); in gk20a_grctx_generate_main()
59 gf100_gr_wait_idle(gr); in gk20a_grctx_generate_main()
62 gf100_gr_wait_idle(gr); in gk20a_grctx_generate_main()
[all …]
H A Dnouveau_nvkm_engine_gr_tu102.c35 tu102_gr_init_fecs_exceptions(struct gf100_gr *gr) in tu102_gr_init_fecs_exceptions() argument
37 nvkm_wr32(gr->base.engine.subdev.device, 0x409c24, 0x006f0002); in tu102_gr_init_fecs_exceptions()
41 tu102_gr_init_fs(struct gf100_gr *gr) in tu102_gr_init_fs() argument
43 struct nvkm_device *device = gr->base.engine.subdev.device; in tu102_gr_init_fs()
46 gp100_grctx_generate_smid_config(gr); in tu102_gr_init_fs()
47 gk104_grctx_generate_gpc_tpc_nr(gr); in tu102_gr_init_fs()
49 for (sm = 0; sm < gr->sm_nr; sm++) { in tu102_gr_init_fs()
50 nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 + in tu102_gr_init_fs()
51 gr->sm[sm].tpc * 4), sm); in tu102_gr_init_fs()
54 gm200_grctx_generate_dist_skip_table(gr); in tu102_gr_init_fs()
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/gm200/gr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/gm200/gr/fecs_bl.bin
6 FILES+= ${.CURDIR}/../../dist/gm200/gr/fecs_data.bin
7 FILES+= ${.CURDIR}/../../dist/gm200/gr/fecs_inst.bin
8 FILES+= ${.CURDIR}/../../dist/gm200/gr/fecs_sig.bin
9 FILES+= ${.CURDIR}/../../dist/gm200/gr/gpccs_bl.bin
10 FILES+= ${.CURDIR}/../../dist/gm200/gr/gpccs_data.bin
11 FILES+= ${.CURDIR}/../../dist/gm200/gr/gpccs_inst.bin
12 FILES+= ${.CURDIR}/../../dist/gm200/gr/gpccs_sig.bin
13 FILES+= ${.CURDIR}/../../dist/gm200/gr/sw_bundle_init.bin
14 FILES+= ${.CURDIR}/../../dist/gm200/gr/sw_ctx.bin
[all …]
/netbsd-src/external/bsd/libbind/dist/irs/
H A Dirp_gr.c84 static void free_group(struct group *gr);
96 struct irs_gr *gr; in irs_irp_gr() local
99 if (!(gr = memget(sizeof *gr))) { in irs_irp_gr()
103 memset(gr, 0x0, sizeof *gr); in irs_irp_gr()
106 memput(gr, sizeof *gr); in irs_irp_gr()
113 gr->private = pvt; in irs_irp_gr()
114 gr->close = gr_close; in irs_irp_gr()
115 gr->next = gr_next; in irs_irp_gr()
116 gr->byname = gr_byname; in irs_irp_gr()
117 gr->bygid = gr_bygid; in irs_irp_gr()
[all …]
H A Dgetgrent.c119 struct irs_gr *gr; in getgrent_p() local
121 if (!net_data || !(gr = net_data->gr)) in getgrent_p()
123 net_data->gr_last = (*gr->next)(gr); in getgrent_p()
129 struct irs_gr *gr; in getgrnam_p() local
131 if (!net_data || !(gr = net_data->gr)) in getgrnam_p()
136 net_data->gr_last = (*gr->byname)(gr, name); in getgrnam_p()
144 struct irs_gr *gr; in getgrgid_p() local
146 if (!net_data || !(gr = net_data->gr)) in getgrgid_p()
151 net_data->gr_last = (*gr->bygid)(gr, gid); in getgrgid_p()
159 struct irs_gr *gr; in setgroupent_p() local
[all …]
H A Dgen_gr.c57 struct irs_gr * gr; member
88 static int grmerge(struct irs_gr *gr, const struct group *src,
106 struct irs_gr *gr; in irs_gen_gr() local
109 if (!(gr = memget(sizeof *gr))) { in irs_gen_gr()
113 memset(gr, 0x5e, sizeof *gr); in irs_gen_gr()
115 memput(gr, sizeof *gr); in irs_gen_gr()
122 gr->private = pvt; in irs_gen_gr()
123 gr->close = gr_close; in irs_gen_gr()
124 gr->next = gr_next; in irs_gen_gr()
125 gr->byname = gr_byname; in irs_gen_gr()
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/gp102/gr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/gp102/gr/fecs_data.bin
6 FILES+= ${.CURDIR}/../../dist/gp102/gr/fecs_inst.bin
7 FILES+= ${.CURDIR}/../../dist/gp102/gr/fecs_sig.bin
8 FILES+= ${.CURDIR}/../../dist/gp102/gr/gpccs_data.bin
9 FILES+= ${.CURDIR}/../../dist/gp102/gr/gpccs_inst.bin
10 FILES+= ${.CURDIR}/../../dist/gp102/gr/gpccs_sig.bin
11 FILES+= ${.CURDIR}/../../dist/gp102/gr/sw_bundle_init.bin
12 FILES+= ${.CURDIR}/../../dist/gp102/gr/sw_ctx.bin
13 FILES+= ${.CURDIR}/../../dist/gp102/gr/sw_method_init.bin
14 FILES+= ${.CURDIR}/../../dist/gp102/gr/sw_nonctx.bin
[all …]
/netbsd-src/sys/arch/arm/arm/
H A Dsig_machdep.c163 __greg_t * const gr = mcp->__gregs; in cpu_getmcontext() local
167 gr[_REG_R0] = tf->tf_r0; in cpu_getmcontext()
168 gr[_REG_R1] = tf->tf_r1; in cpu_getmcontext()
169 gr[_REG_R2] = tf->tf_r2; in cpu_getmcontext()
170 gr[_REG_R3] = tf->tf_r3; in cpu_getmcontext()
171 gr[_REG_R4] = tf->tf_r4; in cpu_getmcontext()
172 gr[_REG_R5] = tf->tf_r5; in cpu_getmcontext()
173 gr[_REG_R6] = tf->tf_r6; in cpu_getmcontext()
174 gr[_REG_R7] = tf->tf_r7; in cpu_getmcontext()
175 gr[_REG_R8] = tf->tf_r8; in cpu_getmcontext()
[all …]
/netbsd-src/sys/arch/sh3/sh3/
H A Dsh3_machdep.c401 __greg_t *gr = mcp->__gregs; in cpu_getmcontext() local
405 gr[_REG_GBR] = tf->tf_gbr; in cpu_getmcontext()
406 gr[_REG_PC] = tf->tf_spc; in cpu_getmcontext()
407 gr[_REG_SR] = tf->tf_ssr; in cpu_getmcontext()
408 gr[_REG_MACL] = tf->tf_macl; in cpu_getmcontext()
409 gr[_REG_MACH] = tf->tf_mach; in cpu_getmcontext()
410 gr[_REG_PR] = tf->tf_pr; in cpu_getmcontext()
411 gr[_REG_R14] = tf->tf_r14; in cpu_getmcontext()
412 gr[_REG_R13] = tf->tf_r13; in cpu_getmcontext()
413 gr[_REG_R12] = tf->tf_r12; in cpu_getmcontext()
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/tu102/gr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/tu102/gr/fecs_bl.bin
6 FILES+= ${.CURDIR}/../../dist/tu102/gr/fecs_data.bin
7 FILES+= ${.CURDIR}/../../dist/tu102/gr/fecs_inst.bin
8 FILES+= ${.CURDIR}/../../dist/tu102/gr/fecs_sig.bin
9 FILES+= ${.CURDIR}/../../dist/tu102/gr/gpccs_bl.bin
10 FILES+= ${.CURDIR}/../../dist/tu102/gr/gpccs_data.bin
11 FILES+= ${.CURDIR}/../../dist/tu102/gr/gpccs_inst.bin
12 FILES+= ${.CURDIR}/../../dist/tu102/gr/gpccs_sig.bin
13 FILES+= ${.CURDIR}/../../dist/tu102/gr/sw_bundle_init.bin
14 FILES+= ${.CURDIR}/../../dist/tu102/gr/sw_ctx.bin
[all …]
/netbsd-src/sys/arch/sparc64/sparc64/
H A Dnetbsd32_machdep.c410 greg32_t *gr = mcp->__gregs; in netbsd32_cpu_getmcontext()
424 gr[_REG_PSR] = TSTATECCR_TO_PSR(tf->tf_tstate); in netbsd32_cpu_getmcontext()
425 gr[_REG_PC] = tf->tf_pc; in netbsd32_cpu_getmcontext()
426 gr[_REG_nPC] = tf->tf_npc; in netbsd32_cpu_getmcontext()
427 gr[_REG_Y] = tf->tf_y; in netbsd32_cpu_getmcontext()
428 gr[_REG_G1] = tf->tf_global[1]; in netbsd32_cpu_getmcontext()
429 gr[_REG_G2] = tf->tf_global[2]; in netbsd32_cpu_getmcontext()
430 gr[_REG_G3] = tf->tf_global[3]; in netbsd32_cpu_getmcontext()
431 gr[_REG_G4] = tf->tf_global[4]; in netbsd32_cpu_getmcontext()
432 gr[_REG_G5] = tf->tf_global[5]; in netbsd32_cpu_getmcontext()
[all …]
/netbsd-src/sys/arch/m68k/m68k/
H A Dsig_machdep.c198 __greg_t *gr = mcp->__gregs; in cpu_getmcontext() local
204 gr[_REG_D0] = frame->f_regs[D0]; in cpu_getmcontext()
205 gr[_REG_D1] = frame->f_regs[D1]; in cpu_getmcontext()
206 gr[_REG_D2] = frame->f_regs[D2]; in cpu_getmcontext()
207 gr[_REG_D3] = frame->f_regs[D3]; in cpu_getmcontext()
208 gr[_REG_D4] = frame->f_regs[D4]; in cpu_getmcontext()
209 gr[_REG_D5] = frame->f_regs[D5]; in cpu_getmcontext()
210 gr[_REG_D6] = frame->f_regs[D6]; in cpu_getmcontext()
211 gr[_REG_D7] = frame->f_regs[D7]; in cpu_getmcontext()
212 gr[_REG_A0] = frame->f_regs[A0]; in cpu_getmcontext()
[all …]
/netbsd-src/external/nvidia-firmware/nouveau/tu116/gr/
H A DMakefile5 FILES+= ${.CURDIR}/../../dist/tu116/gr/fecs_bl.bin
6 FILES+= ${.CURDIR}/../../dist/tu116/gr/fecs_data.bin
7 FILES+= ${.CURDIR}/../../dist/tu116/gr/fecs_inst.bin
8 FILES+= ${.CURDIR}/../../dist/tu116/gr/fecs_sig.bin
9 FILES+= ${.CURDIR}/../../dist/tu116/gr/gpccs_bl.bin
10 FILES+= ${.CURDIR}/../../dist/tu116/gr/gpccs_data.bin
11 FILES+= ${.CURDIR}/../../dist/tu116/gr/gpccs_inst.bin
12 FILES+= ${.CURDIR}/../../dist/tu116/gr/gpccs_sig.bin
13 FILES+= ${.CURDIR}/../../dist/tu116/gr/sw_bundle_init.bin
14 FILES+= ${.CURDIR}/../../dist/tu116/gr/sw_ctx.bin
[all …]

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