Searched refs:gfx_table (Results 1 – 12 of 12) sorted by relevance
447 single_dpm_table = &(dpm_table->gfx_table); in arcturus_set_default_dpm_table()573 struct arcturus_single_dpm_table *gfx_table = NULL; in arcturus_populate_umd_state_clk() local577 gfx_table = &(dpm_table->gfx_table); in arcturus_populate_umd_state_clk()580 smu->pstate_sclk = gfx_table->dpm_levels[0].value; in arcturus_populate_umd_state_clk()583 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()585 smu->pstate_sclk = gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()644 single_dpm_table = &(dpm_table->gfx_table); in arcturus_print_clk_levels()752 single_dpm_table = &(dpm_table->gfx_table); in arcturus_upload_dpm_level()813 single_dpm_table = &(dpm_table->gfx_table); in arcturus_force_clk_levels()1171 soft_level = arcturus_find_highest_dpm_level(&(dpm_table->gfx_table)); in arcturus_force_dpm_limit_value()[all …]
748 single_dpm_table = &(dpm_table->gfx_table); in vega20_set_default_dpm_table()910 struct vega20_single_dpm_table *gfx_table = NULL; in vega20_populate_umd_state_clk() local914 gfx_table = &(dpm_table->gfx_table); in vega20_populate_umd_state_clk()917 smu->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umd_state_clk()920 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umd_state_clk()922 smu->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umd_state_clk()978 single_dpm_table = &(dpm_table->gfx_table); in vega20_print_clk_levels()1205 single_dpm_table = &(dpm_table->gfx_table); in vega20_upload_dpm_level()1296 single_dpm_table = &(dpm_table->gfx_table); in vega20_force_clk_levels()1457 single_dpm_table = &(dpm_table->gfx_table); in vega20_get_clock_by_type_with_latency()[all …]
63 struct arcturus_single_dpm_table gfx_table; member
113 struct vega20_single_dpm_table gfx_table; member
632 dpm_context->dpm_tables.gfx_table.min = driver_ppt->FreqTableGfx[0]; in navi10_set_default_dpm_table()633 dpm_context->dpm_tables.gfx_table.max = driver_ppt->FreqTableGfx[NUM_GFXCLK_DPM_LEVELS - 1]; in navi10_set_default_dpm_table()
580 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()701 struct vega12_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table);1050 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()1133 max_freq = data->dpm_table.gfx_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()1521 soft_level = vega12_find_highest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_highest()1523 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()1524 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()1525 data->dpm_table.gfx_table.dpm_levels[soft_level].value; in vega12_force_dpm_highest()1550 soft_level = vega12_find_lowest_dpm_level(&(data->dpm_table.gfx_table)); in vega12_force_dpm_lowest()1552 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()[all …]
601 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()667 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()1453 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()1455 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()1472 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()1544 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local1547 hwmgr->pstate_sclk = gfx_table->dpm_levels[0].value; in vega20_populate_umdpstate_clocks()1550 if (gfx_table->count > VEGA20_UMD_PSTATE_GFXCLK_LEVEL && in vega20_populate_umdpstate_clocks()1552 hwmgr->pstate_sclk = gfx_table->dpm_levels[VEGA20_UMD_PSTATE_GFXCLK_LEVEL].value; in vega20_populate_umdpstate_clocks()1812 min_freq = data->dpm_table.gfx_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()[all …]
1355 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()1677 struct vega10_single_dpm_table *dpm_table = &(data->dpm_table.gfx_table); in vega10_populate_all_graphic_levels()3329 struct vega10_single_dpm_table *sclk_table = &(data->dpm_table.gfx_table); in vega10_find_dpm_states_clocks_in_dpm_table()3381 for (count = 0; count < dpm_table->gfx_table.count; count++) in vega10_populate_and_upload_sclk_mclk_dpm_levels()3382 dpm_table->gfx_table.dpm_levels[count].value = odn_clk_table->entries[count].clk; in vega10_populate_and_upload_sclk_mclk_dpm_levels()3465 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()3535 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()3540 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()3589 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()3593 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()[all …]
129 struct vega12_single_dpm_table gfx_table; member
150 struct vega10_single_dpm_table gfx_table; member
181 struct vega20_single_dpm_table gfx_table; member
102 struct smu_11_0_dpm_table gfx_table; member