Home
last modified time | relevance | path

Searched refs:get_reg_field_value (Results 1 – 23 of 23) sorted by relevance

/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
H A Damdgpu_dce120_timing_generator.c100 field = get_reg_field_value(value, CRTC0_CRTC_STATUS, CRTC_V_BLANK); in dce120_timing_generator_is_in_vertical_blank()
182 uint32_t field = get_reg_field_value( in dce120_timing_generator_get_vblank_counter()
199 position->horizontal_count = get_reg_field_value(value, in dce120_timing_generator_get_crtc_position()
202 position->vertical_count = get_reg_field_value(value, in dce120_timing_generator_get_crtc_position()
210 position->nominal_vcount = get_reg_field_value(value, in dce120_timing_generator_get_crtc_position()
261 get_reg_field_value(value_crtc_vtotal, in dce120_timing_generator_setup_global_swap_lock()
324 if (get_reg_field_value(pol_value, in dce120_timing_generator_enable_reset_trigger()
384 return get_reg_field_value(value, in dce120_timing_generator_did_triggered_reset_occur()
618 position->horizontal_count = get_reg_field_value( in dce120_timing_generator_get_position()
623 position->vertical_count = get_reg_field_value( in dce120_timing_generator_get_position()
[all …]
H A Damdgpu_dce120_hw_sequencer.c120 chunk_int = get_reg_field_value(
125 chunk_mul = get_reg_field_value(
H A Damdgpu_dce120_resource.c669 straps->audio_stream_number = get_reg_field_value(reg_val, in read_dce_straps()
672 straps->hdmi_disable = get_reg_field_value(reg_val, in read_dce_straps()
677 straps->dc_pinstraps_audio = get_reg_field_value(reg_val, in read_dce_straps()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce110/
H A Damdgpu_dce110_timing_generator.c106 field = get_reg_field_value(value, CRTC_STATUS, CRTC_V_BLANK); in dce110_timing_generator_is_in_vertical_blank()
205 struc_en = get_reg_field_value(
210 struc_stereo_sel_ovr = get_reg_field_value(
523 uint32_t field = get_reg_field_value( in dce110_timing_generator_get_vblank_counter()
547 position->horizontal_count = get_reg_field_value( in dce110_timing_generator_get_position()
552 position->vertical_count = get_reg_field_value( in dce110_timing_generator_get_position()
559 position->nominal_vcount = get_reg_field_value( in dce110_timing_generator_get_position()
588 *v_blank_start = get_reg_field_value(value, in dce110_timing_generator_get_crtc_scanoutpos()
591 *v_blank_end = get_reg_field_value(value, in dce110_timing_generator_get_crtc_scanoutpos()
1291 check_point = get_reg_field_value(value_crtc_vtotal, in dce110_timing_generator_setup_global_swap_lock()
[all …]
H A Damdgpu_dce110_timing_generator_v.c154 field = get_reg_field_value(value, CRTCV_STATUS, CRTC_V_BLANK); in dce110_timing_generator_v_is_in_vertical_blank()
168 h1 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving()
173 v1 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving()
180 h2 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving()
185 v2 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving()
612 uint32_t field = get_reg_field_value( in dce110_timing_generator_v_get_vblank_counter()
H A Damdgpu_dce110_compressor.c128 if (get_reg_field_value( in wait_for_fbc_state_changed()
281 if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) { in dce110_compressor_is_fbc_enabled_in_hw()
288 if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) { in dce110_compressor_is_fbc_enabled_in_hw()
291 if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) { in dce110_compressor_is_fbc_enabled_in_hw()
H A Damdgpu_dce110_opp_regamma_v.c79 if (get_reg_field_value(value, in power_on_lut()
82 get_reg_field_value(value, in power_on_lut()
H A Damdgpu_dce110_transform_v.c199 get_reg_field_value(value, SCLV_MODE, SCL_MODE), in setup_scaling_configuration()
204 get_reg_field_value(value, SCLV_MODE, SCL_PSCL_EN), in setup_scaling_configuration()
316 if (get_reg_field_value( in program_multi_taps_filter()
H A Damdgpu_dce110_opp_csc_v.c120 bool use_set_a = (get_reg_field_value(cntl_value, in program_color_matrix_v()
561 use_set_a = get_reg_field_value( in program_input_csc()
H A Damdgpu_dce110_mem_input_v.c484 if (get_reg_field_value(value, UNP_GRPH_UPDATE, in dce_mem_input_v_is_surface_pending()
H A Damdgpu_dce110_hw_sequencer.c157 chunk_int = get_reg_field_value( in dce110_init_pte()
162 chunk_mul = get_reg_field_value( in dce110_init_pte()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce112/
H A Damdgpu_dce112_compressor.c308 if (get_reg_field_value( in wait_for_fbc_state_changed()
455 if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) { in dce112_compressor_is_fbc_enabled_in_hw()
462 if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) { in dce112_compressor_is_fbc_enabled_in_hw()
465 if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) { in dce112_compressor_is_fbc_enabled_in_hw()
481 return get_reg_field_value( in dce112_compressor_is_lpt_enabled_in_hw()
636 channels = get_reg_field_value(value_control, in dce112_compressor_enable_lpt()
H A Damdgpu_dce112_hw_sequencer.c84 chunk_int = get_reg_field_value( in dce112_init_pte()
89 chunk_mul = get_reg_field_value( in dce112_init_pte()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce/
H A Damdgpu_dce_aux.c98 uint32_t field = get_reg_field_value( in is_engine_available()
111 uint32_t field = get_reg_field_value( in acquire_engine()
119 field = get_reg_field_value(value, in acquire_engine()
164 field = get_reg_field_value( in acquire_engine()
376 *returned_bytes = get_reg_field_value(value, in get_channel_status()
H A Damdgpu_dce_audio.c462 field = get_reg_field_value(value, in dce_aud_az_configure()
881 port_connectivity = get_reg_field_value(value, in dce_aud_endpoint_valid()
H A Damdgpu_dce_link_encoder.c1382 get_reg_field_value(hpd_enable, DC_HPD_CONTROL, DC_HPD_EN); in dce110_link_encoder_enable_hpd()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce80/
H A Damdgpu_irq_service_dce80.c54 get_reg_field_value( in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/
H A Damdgpu_irq_service_dce120.c54 get_reg_field_value( in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/
H A Damdgpu_irq_service_dcn20.c135 get_reg_field_value( in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/
H A Damdgpu_irq_service_dcn10.c135 get_reg_field_value( in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/
H A Damdgpu_irq_service_dcn21.c136 get_reg_field_value( in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce110/
H A Damdgpu_irq_service_dce110.c54 uint32_t current_status = get_reg_field_value(value, in hpd_ack()
/netbsd-src/sys/external/bsd/drm2/dist/drm/amd/display/dc/
H A Ddm_services.h116 #define get_reg_field_value(reg_value, reg_name, reg_field)\ macro