/netbsd-src/external/apache2/llvm/dist/llvm/utils/TableGen/ |
H A D | DAGISelMatcherEmitter.cpp | 670 << getEnumName(cast<EmitIntegerMatcher>(N)->getVT()) << ", "; in EmitMatcher() 679 << getEnumName(cast<EmitStringIntegerMatcher>(N)->getVT()) << ", " << Val in EmitMatcher() 690 OS << "OPC_EmitRegister2, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher() 694 OS << "OPC_EmitRegister, " << getEnumName(Matcher->getVT()) << ", "; in EmitMatcher() 797 OS << getEnumName(EN->getVT(i)) << ", "; in EmitMatcher()
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H A D | DAGISelMatcher.h | 825 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 849 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 874 MVT::SimpleValueType getVT() const { return VT; } in getVT() function 1018 MVT::SimpleValueType getVT(unsigned i) const { in getVT() function
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
H A D | ValueTypes.cpp | 501 MVT MVT::getVT(Type *Ty, bool HandleUnknown){ in getVT() function in MVT 524 getVT(VTy->getElementType(), /*HandleUnknown=*/ false), in getVT() 536 return MVT::getVT(Ty, HandleUnknown); in getEVT()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 1253 cast<VTSDNode>(N.getOperand(1))->getVT() == MVT::i32) { in selectSExti32() 1259 cast<VTSDNode>(N->getOperand(1))->getVT().bitsLE(MVT::i32)) { in selectSExti32() 1264 cast<VTSDNode>(N->getOperand(1))->getVT().bitsLT(MVT::i32)) { in selectSExti32() 1282 cast<VTSDNode>(N->getOperand(1))->getVT().bitsLE(MVT::i32)) { in selectZExti32()
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H A D | RISCVInstrInfo.td | 880 return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLE(MVT::i32); 884 return cast<VTSDNode>(N->getOperand(1))->getVT().bitsLE(MVT::i32);
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86InterleavedAccess.cpp | 562 MVT VT = MVT::getVT(Shuffles[0]->getType()); in deinterleave8bitStride3()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 1007 EVT VT = cast<VTSDNode>(N)->getVT(); in RemoveNodeFromCSEMaps() 3159 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits() 3300 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in computeKnownBits() 3698 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits() 3701 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in ComputeNumSignBits() 3808 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits(); in ComputeNumSignBits() 5663 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() 5675 EVT EVT = cast<VTSDNode>(N2)->getVT(); in getNode() 5718 assert(VT.isInteger() && cast<VTSDNode>(N2)->getVT().isInteger() && in getNode() 5726 assert(!cast<VTSDNode>(N2)->getVT().isVector() && in getNode() [all …]
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H A D | SelectionDAGDumper.cpp | 684 OS << ":" << N->getVT().getEVTString(); in print_details()
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H A D | TargetLowering.cpp | 795 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyMultipleUseDemandedBits() 1802 EVT ExVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits() 2062 EVT ZVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in SimplifyDemandedBits() 3756 !isSExtCheaperThanZExt(cast<VTSDNode>(N0.getOperand(1))->getVT(), in SimplifySetCC() 3758 EVT ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT(); in SimplifySetCC() 3861 cast<VTSDNode>(Op0.getOperand(1))->getVT() == MVT::i1) in SimplifySetCC() 4704 MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true); in ParseConstraints() 4711 OpInfo.ConstraintVT = MVT::getVT(OpTy, true); in ParseConstraints() 8616 EVT SatVT = cast<VTSDNode>(Node->getOperand(1))->getVT(); in expandFP_TO_INT_SAT()
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H A D | SelectionDAGISel.cpp | 2607 if (cast<VTSDNode>(N)->getVT() == VT) in CheckValueType() 2611 return VT == MVT::iPTR && cast<VTSDNode>(N)->getVT() == TLI->getPointerTy(DL); in CheckValueType()
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H A D | LegalizeVectorOps.cpp | 981 EVT OrigTy = cast<VTSDNode>(Node->getOperand(1))->getVT(); in ExpandSEXTINREG()
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H A D | LegalizeVectorTypes.cpp | 396 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() 1368 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT()); in SplitVecRes_InregOp() 3752 cast<VTSDNode>(N->getOperand(1))->getVT() in WidenVecRes_InregOp()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
H A D | WebAssemblyISelLowering.cpp | 1651 cast<VTSDNode>(Op.getOperand(1).getNode())->getVT().getSimpleVT(); in LowerSIGN_EXTEND_INREG() 2039 EVT SatVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerFP_TO_INT_SAT() 2210 if (cast<VTSDNode>(FPToInt.getOperand(1))->getVT() != MVT::i32) in performVectorTruncSatLowCombine()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 1463 : cast<VTSDNode>(N.getOperand(1))->getVT(); in DetectUseSxtw() 1532 if (T->getVT().getSizeInBits() == NumBits) { in keepsLowBits() 1605 return VN->getVT().getSizeInBits() <= 16; in isPositiveHalfWord()
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H A D | HexagonISelLowering.cpp | 1063 EVT OrigTy = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerSETCC() 2031 Info.memVT = MVT::getVT(ElTy); in getTgtMemIntrinsic() 2056 Info.memVT = MVT::getVT(VecTy); in getTgtMemIntrinsic()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARC/ |
H A D | ARCISelLowering.cpp | 183 unsigned Width = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits(); in LowerSIGN_EXTEND_INREG()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 3321 EVT SatVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerFP_TO_INT_SAT() 4666 EVT ExtraVT = cast<VTSDNode>(Op.getOperand(1))->getVT(); in LowerOperation() 6575 cast<VTSDNode>(Val.getOperand(1))->getVT().getFixedSizeInBits() - in lookThroughSignExtension() 10874 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 10885 Info.memVT = MVT::getVT(PtrTy->getElementType()); in getTgtMemIntrinsic() 10913 Info.memVT = MVT::getVT(I.getType()); in getTgtMemIntrinsic() 10925 Info.memVT = MVT::getVT(I.getOperand(0)->getType()); in getTgtMemIntrinsic() 12075 return TypeNode->getVT(); in calculatePreExtendType() 12796 MemVT = cast<VTSDNode>(Src->getOperand(3))->getVT(); in performSVEAndCombine() 12813 MemVT = cast<VTSDNode>(Src->getOperand(4))->getVT(); in performSVEAndCombine() [all …]
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H A D | AArch64ISelDAGToDAG.cpp | 555 SrcVT = cast<VTSDNode>(N.getOperand(1))->getVT(); in getExtendTypeForNode() 1876 unsigned Width = cast<VTSDNode>(N->getOperand(1))->getVT().getSizeInBits(); in isBitfieldExtractOpFromSExtInReg() 4917 return cast<VTSDNode>(Root->getOperand(3))->getVT(); in getMemVTFromNode() 4919 return cast<VTSDNode>(Root->getOperand(4))->getVT(); in getMemVTFromNode()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 1344 static MVT getVT(Type *Ty, bool HandleUnknown = false);
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/ |
H A D | AArch64CallLowering.cpp | 395 LLT OldLLT(MVT::getVT(CurArgInfo.Ty)); in lowerReturn()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
H A D | CallLowering.cpp | 872 MVT VT = MVT::getVT(Outs[I].Ty); in checkReturn()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 1079 Info.memVT = MVT::getVT(CI.getArgOperand(0)->getType()); in getTgtMemIntrinsic() 1099 Info.memVT = MVT::getVT(CI.getType()); in getTgtMemIntrinsic() 1114 Info.memVT = MVT::getVT(CI.getOperand(0)->getType()); in getTgtMemIntrinsic() 1129 Info.memVT = MVT::getVT(CI.getType()); in getTgtMemIntrinsic() 1142 Info.memVT = MVT::getVT(CI.getType()); in getTgtMemIntrinsic() 1153 Info.memVT = MVT::getVT(CI.getType()); // XXX: what is correct VT? in getTgtMemIntrinsic() 1168 Info.memVT = MVT::getVT(CI.getType()); in getTgtMemIntrinsic() 9435 VTSign->getVT() == MVT::i8) || in performSignExtendInRegCombine() 9437 VTSign->getVT() == MVT::i16)) && in performSignExtendInRegCombine()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Target/ |
H A D | TargetSelectionDAG.td | 922 def vtInt : PatLeaf<(vt), [{ return N->getVT().isInteger(); }]>; 923 def vtFP : PatLeaf<(vt), [{ return N->getVT().isFloatingPoint(); }]>;
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 2210 EVT getVT() const { return ValueType; }
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 509 EVT ExtendTy = cast<VTSDNode>(Op0Op2)->getVT(); in performANDCombine() 917 EVT ExtendTy = cast<VTSDNode>(Op0Op0->getOperand(2))->getVT(); in performSRACombine()
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