/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
H A D | SparcISelDAGToDAG.cpp | 243 SDValue Sub0 = CurDAG->getTargetExtractSubreg(SP::sub_even, dl, MVT::i32, in tryInlineAsm() 245 SDValue Sub1 = CurDAG->getTargetExtractSubreg(SP::sub_odd, dl, MVT::i32, in tryInlineAsm()
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H A D | SparcISelLowering.cpp | 2713 SDValue Hi32 = DAG.getTargetExtractSubreg(SP::sub_even, dl, MVT::f32, in LowerF64Op() 2715 SDValue Lo32 = DAG.getTargetExtractSubreg(SP::sub_odd, dl, MVT::f32, in LowerF64Op() 2862 SDValue Hi64 = DAG.getTargetExtractSubreg(SP::sub_even64, dl, MVT::f64, in LowerFNEGorFABS() 2864 SDValue Lo64 = DAG.getTargetExtractSubreg(SP::sub_odd64, dl, MVT::f64, in LowerFNEGorFABS()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLoweringHVX.cpp | 616 return DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, VecTy, S); in buildHvxVectorReg() 689 return DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, P); in createHvxPrefixPred() 692 return DAG.getTargetExtractSubreg(Hexagon::isub_hi, dl, MVT::i32, P); in createHvxPrefixPred() 930 VecV = DAG.getTargetExtractSubreg(SubIdx, dl, VecTy, VecV); in extractHvxSubvectorReg() 1035 V0 = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, VecV); in insertHvxSubvectorReg() 1036 V1 = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, VecV); in insertHvxSubvectorReg() 1082 SDValue R0 = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, V); in insertHvxSubvectorReg() 1083 SDValue R1 = DAG.getTargetExtractSubreg(Hexagon::isub_hi, dl, MVT::i32, V); in insertHvxSubvectorReg() 1560 return DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, ResTy, Pair); in LowerHvxMulh() 1563 return DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, ResTy, Pair); in LowerHvxMulh()
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H A D | HexagonISelDAGToDAGHVX.cpp | 996 Op = DAG.getTargetExtractSubreg(Sub, dl, HalfTy, Op); in materialize() 1458 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_lo, dl, SingleTy, Vec); in scalarizeShuffle() 1460 Vec = DAG.getTargetExtractSubreg(Hexagon::vsub_hi, dl, SingleTy, Vec); in scalarizeShuffle()
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H A D | HexagonISelLowering.cpp | 2552 T1 = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, T1); in extractVector() 2574 ExtV = DAG.getTargetExtractSubreg(SubIdx, dl, MVT::i32, VecV); in extractVector() 2619 ValR = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, ValR); in insertVector() 2811 W = DAG.getTargetExtractSubreg(Hexagon::isub_lo, dl, MVT::i32, W); in LowerCONCAT_VECTORS()
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H A D | HexagonISelDAGToDAG.cpp | 520 Value = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, in SelectIndexedStore() 803 SDValue E = CurDAG->getTargetExtractSubreg(Hexagon::isub_lo, dl, ResTy, in SelectVAlign()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
H A D | RISCVISelDAGToDAG.cpp | 197 CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, SuperReg)); in selectVLSEG() 240 CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, SuperReg)); in selectVLSEGFF() 288 CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, SuperReg)); in selectVLXSEG() 1136 SDValue Extract = CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, V); in Select()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 2208 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD() 2492 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane() 2797 CurDAG->getTargetExtractSubreg(ARM::qsub_0 + i, Loc, VT, in SelectMVE_VLD() 2903 SDValue SubReg = CurDAG->getTargetExtractSubreg(SubRegs[ResIdx], Loc, in SelectCDE_CXxD() 3037 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg)); in SelectVLDDup() 3094 SDValue NewExt = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt() 3106 SDValue Inp1 = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt() 3108 SDValue Inp2 = CurDAG->getTargetExtractSubreg( in tryInsertVectorElt() 3843 SDValue Lo = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32, in Select() 3845 SDValue Hi = CurDAG->getTargetExtractSubreg(ARM::gsub_1, dl, MVT::i32, in Select() [all …]
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H A D | ARMISelLowering.cpp | 9789 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_1 : ARM::gsub_0, in ReplaceCMP_SWAP_64Results() 9792 DAG.getTargetExtractSubreg(isBigEndian ? ARM::gsub_0 : ARM::gsub_1, in ReplaceCMP_SWAP_64Results()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelDAGToDAG.cpp | 1384 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad() 1423 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad() 1478 ReplaceUses(SDValue(N, i), CurDAG->getTargetExtractSubreg( in SelectPredicatedLoad() 1601 return DAG.getTargetExtractSubreg(AArch64::dsub, SDLoc(V128Reg), NarrowTy, in NarrowVector() 1634 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane() 1686 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
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H A D | AArch64ISelLowering.cpp | 6787 return DAG.getTargetExtractSubreg(AArch64::hsub, DL, VT, Sel); in LowerFCOPYSIGN() 6789 return DAG.getTargetExtractSubreg(AArch64::ssub, DL, VT, Sel); in LowerFCOPYSIGN() 6791 return DAG.getTargetExtractSubreg(AArch64::dsub, DL, VT, Sel); in LowerFCOPYSIGN() 8180 return DAG.getTargetExtractSubreg(AArch64::dsub, DL, NarrowTy, V128Reg); in NarrowVector() 16663 SDValue Lo = DAG.getTargetExtractSubreg(SubReg1, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results() 16665 SDValue Hi = DAG.getTargetExtractSubreg(SubReg2, SDLoc(N), MVT::i64, in ReplaceCMP_SWAP_128Results()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 953 return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N); in convertTo() 1174 Node, CurDAG->getTargetExtractSubreg(SubRegIdx, DL, VT, Op).getNode()); in loadVectorConstant()
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H A D | SystemZISelLowering.cpp | 2694 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result); in lowerGR128Binary() 2695 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result); in lowerGR128Binary() 3354 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, in lowerBITCAST() 3363 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST() 5506 SDValue Hi = DAG.getTargetExtractSubreg(SystemZ::subreg_h64, in lowerGR128ToI128() 5508 SDValue Lo = DAG.getTargetExtractSubreg(SystemZ::subreg_l64, in lowerGR128ToI128()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUISelDAGToDAG.cpp | 2411 = CurDAG->getTargetExtractSubreg(SubReg, SL, VT, SDValue(CmpSwap, 0)); in SelectATOMIC_CMP_SWAP() 2785 Lo = CurDAG->getTargetExtractSubreg( in SelectVOP3PMods() 2791 Hi = CurDAG->getTargetExtractSubreg( in SelectVOP3PMods()
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H A D | SIISelLowering.cpp | 11469 SDValue PtrLo = DAG.getTargetExtractSubreg(AMDGPU::sub0, DL, MVT::i32, Ptr); in buildRSRC() 11470 SDValue PtrHi = DAG.getTargetExtractSubreg(AMDGPU::sub1, DL, MVT::i32, Ptr); in buildRSRC()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 5307 CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result); in Select() 5387 CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl, MVT::i8, FNSTSW); in Select() 5552 Reg = CurDAG->getTargetExtractSubreg(SubRegOp, dl, VT, Reg); in Select() 5658 Result = CurDAG->getTargetExtractSubreg(SubIndex, dl, VT, Result); in Select() 5706 Result = CurDAG->getTargetExtractSubreg(SubIndex, dl, VT, Result); in Select()
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H A D | X86ISelLowering.cpp | 25937 SDValue Result0 = DAG.getTargetExtractSubreg(X86::sub_mask_0, DL, in LowerINTRINSIC_WO_CHAIN() 25939 SDValue Result1 = DAG.getTargetExtractSubreg(X86::sub_mask_1, DL, in LowerINTRINSIC_WO_CHAIN()
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/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 1459 SDValue getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 5446 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAG.cpp | 8618 SDValue SelectionDAG::getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT, in getTargetExtractSubreg() function in SelectionDAG
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