| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86EvexToVex.cpp | 162 MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
177 MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
199 const MachineOperand &Imm = MI.getOperand(MI.getNumExplicitOperands()-1); in performCustomAdjustments()
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| H A D | X86FixupBWInsts.cpp | 310 assert(MI->getNumExplicitOperands() == 2); in tryReplaceCopy()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 562 for (unsigned I = getNumExplicitOperands(), E = getNumOperands();
573 return getNumOperands() - getNumExplicitOperands();
592 unsigned getNumExplicitOperands() const;
615 operands_begin() + getNumExplicitOperands());
619 operands_begin() + getNumExplicitOperands());
664 operands_begin() + getNumExplicitOperands());
668 operands_begin() + getNumExplicitOperands());
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyFixIrreducibleControlFlow.cpp | 382 unsigned Index = MIB.getInstr()->getNumExplicitOperands() - 1; in makeSingleEntryLoop()
480 ->getOperand(MIB.getInstr()->getNumExplicitOperands() - 1) in makeSingleEntryLoop()
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| H A D | WebAssemblyFixBrTableDefaults.cpp | 129 MI.RemoveOperand(MI.getNumExplicitOperands() - 1); in fixBrTableDefault()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 439 FirstOpNum = CCUserMI->getNumExplicitOperands() - 2; in adjustCCMasksForInstr()
511 return Compare.getNumExplicitOperands() == 2 && in isCompareZero()
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| H A D | SystemZInstrInfo.cpp | 521 if (MI.getNumExplicitOperands() == 2 && MI.getOperand(0).isReg() && in analyzeCompare()
1184 unsigned NumOps = MI.getNumExplicitOperands(); in foldMemoryOperandImpl()
1863 0 : CCUsers[Idx]->getNumExplicitOperands() - 2); in prepareCompareSwapOperands()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| H A D | RISCVMCInstLower.cpp | 151 int NumOps = MI->getNumExplicitOperands(); in lowerRISCVVMachineInstrToMCInst()
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| H A D | RISCVInstrInfo.cpp | 685 int NumOp = MI.getNumExplicitOperands(); in getBranchDestBlock()
907 if (LdSt.getNumExplicitOperands() != 3) in getMemOperandWithOffsetWidth()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64CondBrTuning.cpp | 91 for (unsigned I = MI.getNumExplicitOperands(), E = MI.getNumOperands(); in convertToFlagSetting()
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| H A D | AArch64SLSHardening.cpp | 349 for (unsigned OpIdx = BL->getNumExplicitOperands(); in ConvertBLRToBL()
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| H A D | AArch64InstrInfo.cpp | 2552 if (LdSt.getNumExplicitOperands() == 3) { in getMemOperandWithOffsetWidth()
2557 } else if (LdSt.getNumExplicitOperands() == 4) { in getMemOperandWithOffsetWidth()
2578 if (LdSt.getNumExplicitOperands() == 3) { in getMemOperandWithOffsetWidth()
2582 assert(LdSt.getNumExplicitOperands() == 4 && "invalid number of operands"); in getMemOperandWithOffsetWidth()
2597 MachineOperand &OfsOp = LdSt.getOperand(LdSt.getNumExplicitOperands() - 1); in getMemOpBaseRegImmOfsOffsetOperand()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | SIShrinkInstructions.cpp | 568 MIB->RemoveOperand(MIB->getNumExplicitOperands()); in matchSwap()
581 unsigned OpNo = MovT.getNumExplicitOperands() + I; in matchSwap()
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| H A D | SIWholeQuadMode.cpp | 1425 assert(MI->getNumExplicitOperands() == 2); in lowerCopyInstrs()
1465 assert(MI->getNumExplicitOperands() == 3); in lowerCopyInstrs()
1473 assert(MI->getNumExplicitOperands() == 2); in lowerCopyInstrs()
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| H A D | SILowerControlFlow.cpp | 529 assert(MI.getNumExplicitOperands() == 3); in combineMasks()
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| H A D | SIFoldOperands.cpp | 504 for (unsigned I = 1, E = Def->getNumExplicitOperands(); I < E; I += 2) { in getRegSeqInit()
1610 if (PHI.getNumExplicitOperands() != 3) // Single input LCSSA PHI in tryFoldLCSSAPhi()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| H A D | ARMSLSHardening.cpp | 311 for (unsigned OpIdx = BL->getNumExplicitOperands(); in ConvertIndirectCallToIndirectJump()
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| H A D | A15SDOptimizer.cpp | 294 for (unsigned I = 1; I < MI->getNumExplicitOperands(); ++I) { in optimizeSDPattern()
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| H A D | Thumb1FrameLowering.cpp | 726 .addImm(MBBI->getNumExplicitOperands() - 2) in emitPopSpecialFixUp()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| H A D | PPCBranchCoalescing.cpp | 263 if (I.getNumOperands() != I.getNumExplicitOperands()) { in canCoalesceBranch()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 84 int NumOp = Inst->getNumExplicitOperands(); in AnalyzeCondBr()
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| H A D | MipsConstantIslandPass.cpp | 1611 if (MI->getNumExplicitOperands() == 2) { in fixupConditionalBr()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| H A D | MachineInstr.cpp | 726 unsigned MachineInstr::getNumExplicitOperands() const { in getNumExplicitOperands() function in MachineInstr
1521 if (isVariadic() || OpIdx >= getNumExplicitOperands()) in getTypeToPrint()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 144 for (unsigned OpI = 0, OpE = I.getNumExplicitOperands(); OpI != OpE; ++OpI) { in constrainSelectedInstRegOperands()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 781 switch (MI.getNumExplicitOperands()) { in addOperandsForVFMK()
|