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Searched refs:getMinVectorRegisterBitWidth (Results 1 – 13 of 13) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/
H A DVETargetTransformInfo.h75 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.h125 unsigned getMinVectorRegisterBitWidth() const;
248 unsigned getMinVectorRegisterBitWidth() const;
H A DAMDGPUTargetTransformInfo.cpp330 unsigned GCNTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in GCNTTIImpl
1266 unsigned R600TTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in R600TTIImpl
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h124 unsigned getMinVectorRegisterBitWidth() { in getMinVectorRegisterBitWidth() function
125 return ST->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
H A DAArch64Subtarget.h349 unsigned getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h77 unsigned getMinVectorRegisterBitWidth() const { return 32; } in getMinVectorRegisterBitWidth() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.cpp107 return TypeSize::getFixed(getMinVectorRegisterBitWidth()); in getRegisterBitWidth()
115 unsigned HexagonTTIImpl::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in HexagonTTIImpl
H A DHexagonTargetTransformInfo.h85 unsigned getMinVectorRegisterBitWidth() const;
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h935 unsigned getMinVectorRegisterBitWidth() const;
1575 virtual unsigned getMinVectorRegisterBitWidth() = 0;
2023 unsigned getMinVectorRegisterBitWidth() override { in getMinVectorRegisterBitWidth() function
2024 return Impl.getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
H A DTargetTransformInfoImpl.h394 unsigned getMinVectorRegisterBitWidth() const { return 128; } in getMinVectorRegisterBitWidth() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp592 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const { in getMinVectorRegisterBitWidth() function in TargetTransformInfo
593 return TTIImpl->getMinVectorRegisterBitWidth(); in getMinVectorRegisterBitWidth()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
H A DVectorCombine.cpp140 unsigned MinVectorSize = TTI.getMinVectorRegisterBitWidth(); in vectorizeLoadInsert()
H A DSLPVectorizer.cpp619 MinVecRegSize = TTI->getMinVectorRegisterBitWidth(); in BoUpSLP()