Home
last modified time | relevance | path

Searched refs:getMask (Results 1 – 25 of 43) sorted by relevance

12

/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/Support/
H A DLowLevelTypeImpl.h261 static uint64_t getMask(const BitFieldInfo FieldInfo) {
270 return maskAndShift(Val, getMask(FieldInfo), FieldInfo[1]);
273 return getMask(FieldInfo) & (RawData >> FieldInfo[1]);
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
H A DM68kCollapseMOVEMPass.cpp85 unsigned getMask() const { return Mask; } in getMask() function in __anon55c4489a0111::MOVEMState
189 .addImm(State.getMask()) in Finish()
196 .addImm(State.getMask()); in Finish()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp313 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this); in getMatchingSuperRegClass()
353 firstCommonClass(IA.getMask(), IB.getMask(), this); in getCommonSuperRegClass()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUArgumentUsageInfo.h81 unsigned getMask() const { in getMask() function
H A DSIMachineFunctionInfo.cpp521 SA.Mask = Arg.getMask(); in convertArgumentInfo()
/netbsd-src/external/apache2/llvm/dist/clang/lib/CodeGen/
H A DSanitizerMetadata.cpp74 if (Attr->getMask() & SanitizerKind::Address) in reportGlobalToASan()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/
H A DVPlan.h1135 VPValue *getMask(unsigned Idx) const { return getOperand(Idx * 2 + 1); } in getMask() function
1188 VPValue *getMask() const { in getMask() function
1345 if (VPValue *Mask = getMask()) in print()
1354 VPValue *getMask() const { in getMask() function
1435 VPValue *getMask() const { in getMask() function
H A DVPlan.cpp1061 getMask(I)->printAsOperand(O, SlotTracker); in print()
H A DLoopVectorize.cpp9214 Recipe->getMask()); in buildVPlanWithVPRecipes()
9367 VPValue *Mask = getMask(); in print()
9439 Value *Cond = State.get(getMask(In), Part); in execute()
9452 getStoredValues(), getMask()); in execute()
9536 VPValue *BlockInMask = getMask(); in execute()
9605 StoredValue, getMask()); in execute()
/netbsd-src/external/apache2/llvm/dist/llvm/tools/llvm-readobj/
H A DMachODumper.cpp316 static std::string getMask(uint32_t prot) in getMask() function
852 W.printString("maxprot", getMask(MOSegment.maxprot)); in printMachOSegment()
853 W.printString("initprot", getMask(MOSegment.initprot)); in printMachOSegment()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1486 ArrayRef<int> getMask() const {
2329 const SDValue &getMask() const {
2370 const SDValue &getMask() const { return getOperand(3); }
2407 const SDValue &getMask() const { return getOperand(4); }
2451 const SDValue &getMask() const { return getOperand(2); }
H A DTargetRegisterInfo.h1140 const uint32_t *getMask() const { return Mask; } in getMask() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
H A DHexagonVectorCombine.cpp226 Value *getMask(Value *Val) const;
412 auto AlignVectors::getMask(Value *Val) const -> Value * { in getMask() function in AlignVectors
821 Value *Sel = Builder.CreateSelect(getMask(B.Seg.Val), Cast, in realignGroup()
849 Value *Mask = HVC.rescale(Builder, MakeVec(Builder, getMask(S.Seg.Val)), in realignGroup()
H A DHexagonISelDAGToDAGHVX.cpp2051 std::vector<int> Mask(SN->getMask().begin(), SN->getMask().end()); in selectShuffle()
H A DHexagonISelLoweringHVX.cpp1705 SDValue Mask = MaskN->getMask(); in LowerHvxMaskedOp()
1847 VectorPair Masks = opSplit(MaskN->getMask(), dl, DAG); in SplitHvxMemOp()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp4912 !SVN0->getMask().equals(SVN1->getMask())) in hoistLogicOpWithSameOpcodeHands()
4925 return DAG.getVectorShuffle(VT, DL, Logic, ShOp, SVN0->getMask()); in hoistLogicOpWithSameOpcodeHands()
4938 return DAG.getVectorShuffle(VT, DL, ShOp, Logic, SVN0->getMask()); in hoistLogicOpWithSameOpcodeHands()
5627 MLoad->getOffset(), MLoad->getMask(), MLoad->getPassThru(), in visitAND()
5810 SDValue Ops[] = {GN0->getChain(), GN0->getPassThru(), GN0->getMask(), in visitAND()
9666 SDValue Mask = MSC->getMask(); in visitMSCATTER()
9697 SDValue Mask = MST->getMask(); in visitMSTORE()
9722 SDValue Mask = MGT->getMask(); in visitMGATHER()
9755 SDValue Mask = MLD->getMask(); in visitMLOAD()
10731 VT, dl, Ld->getChain(), Ld->getBasePtr(), Ld->getOffset(), Ld->getMask(), in tryToFoldExtOfMaskedLoad()
[all …]
H A DLegalizeVectorTypes.cpp1739 SDValue Mask = MLD->getMask(); in SplitVecRes_MLOAD()
1821 SDValue Mask = MGT->getMask(); in SplitVecRes_MGATHER()
2516 SDValue Mask = MGT->getMask(); in SplitVecOp_MGATHER()
2579 SDValue Mask = N->getMask(); in SplitVecOp_MSTORE()
2657 SDValue Mask = N->getMask(); in SplitVecOp_MSCATTER()
4054 SDValue Mask = N->getMask(); in WidenVecRes_MLOAD()
4079 SDValue Mask = N->getMask(); in WidenVecRes_MGATHER()
4896 SDValue Mask = MST->getMask(); in WidenVecOp_MSTORE()
4936 SDValue Mask = MG->getMask(); in WidenVecOp_MGATHER()
4956 SDValue Mask = MSC->getMask(); in WidenVecOp_MSCATTER()
H A DSelectionDAG.cpp1945 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end()); in getCommutedVectorShuffle()
2535 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(V)->getMask(); in isSplatValue()
2818 assert(NumElts == SVN->getMask().size() && "Unexpected vector size"); in computeKnownBits()
3729 assert(NumElts == SVN->getMask().size() && "Unexpected vector size"); in ComputeNumSignBits()
7576 Offset, LD->getMask(), LD->getPassThru(), in getIndexedMaskedLoad()
7625 ST->getMask(), ST->getMemoryVT(), ST->getMemOperand(), in getIndexedMaskedStore()
7655 assert(N->getMask().getValueType().getVectorElementCount() == in getMaskedGather()
7700 assert(N->getMask().getValueType().getVectorElementCount() == in getMaskedScatter()
H A DLegalizeIntegerTypes.cpp703 N->getOffset(), N->getMask(), ExtPassThru, in PromoteIntRes_MLOAD()
723 SDValue Ops[] = {N->getChain(), ExtPassThru, N->getMask(), N->getBasePtr(), in PromoteIntRes_MGATHER()
1834 SDValue Mask = N->getMask(); in PromoteIntOp_MSTORE()
4715 ArrayRef<int> NewMask = SV->getMask().slice(0, VT.getVectorNumElements()); in PromoteIntRes_VECTOR_SHUFFLE()
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/IR/
H A DDerivedTypes.h88 APInt getMask() const;
/netbsd-src/external/apache2/llvm/dist/llvm/lib/IR/
H A DType.cpp293 APInt IntegerType::getMask() const { in getMask() function in IntegerType
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/
H A DX86ISelLowering.h1688 const SDValue &getMask() const { return getOperand(2); } in getMask() function
H A DX86ISelLowering.cpp6802 ArrayRef<int> Mask = SVN->getMask(); in getTargetConstantBitsFromNode()
7536 ArrayRef<int> ShuffleMask = cast<ShuffleVectorSDNode>(N)->getMask(); in getFauxShuffleMask()
16281 cast<ShuffleVectorSDNode>(NewV1)->getMask() == Mask) in lowerShuffleAsLanePermuteAndRepeatedMask()
16298 cast<ShuffleVectorSDNode>(NewV2)->getMask() == Mask) in lowerShuffleAsLanePermuteAndRepeatedMask()
18388 ArrayRef<int> OrigMask = SVOp->getMask(); in lowerVECTOR_SHUFFLE()
20787 if (hasIdenticalHalvesShuffleMask(Shuf->getMask())) in LowerAVXExtend()
29989 SDValue Mask = N->getMask(); in LowerMSCATTER()
30045 SDValue Mask = N->getMask(); in LowerMLOAD()
30111 SDValue Mask = N->getMask(); in LowerMSTORE()
30156 SDValue Mask = N->getMask(); in LowerMGATHER()
[all …]
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp1791 bool IsSelect = all_of(enumerate(SVN->getMask()), [&](const auto &MaskIdx) { in lowerVECTOR_SHUFFLE()
1813 for (int MaskIndex : SVN->getMask()) { in lowerVECTOR_SHUFFLE()
4103 SDValue Mask = Load->getMask(); in lowerMLOAD()
4138 SDValue Mask = Store->getMask(); in lowerMSTORE()
4357 SDValue Mask = MGN->getMask(); in lowerMGATHER()
4438 SDValue Mask = MSN->getMask(); in lowerMSCATTER()
5911 {MGSN->getChain(), MGN->getPassThru(), MGSN->getMask(), in PerformDAGCombine()
5918 {MGSN->getChain(), MSN->getValue(), MGSN->getMask(), MGSN->getBasePtr(), in PerformDAGCombine()
/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp1921 ArrayRef<int> Mask = cast<ShuffleVectorSDNode>(Op.getNode())->getMask(); in LowerVECTOR_SHUFFLE()
2075 SrcType, SDLoc(N), CastOp, DAG.getUNDEF(SrcType), Shuffle->getMask()); in performVECTOR_SHUFFLECombine()

12