/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMCCodeEmitter.cpp | 557 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 597 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues() 932 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue() 933 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue() 991 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue() 997 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue() 1068 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue() 1069 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue() 1088 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue() 1122 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue() [all …]
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H A D | ARMELFStreamer.cpp | 1363 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in FlushUnwindOpcodes() 1454 UnwindOpAsm.EmitSetSP(MRI->getEncodingValue(FPReg)); in emitMovSP() 1473 unsigned Reg = MRI->getEncodingValue(RegList[i]); in emitRegSave()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
H A D | R600ExpandSpecialInstrs.cpp | 127 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction() 154 if ((TRI.getEncodingValue(Src0) & 0xff) < 127 && in runOnMachineFunction() 155 (TRI.getEncodingValue(Src1) & 0xff) < 127) in runOnMachineFunction() 231 unsigned DstBase = TRI.getEncodingValue(DstReg) & HW_REG_MASK; in runOnMachineFunction()
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H A D | R600RegisterInfo.cpp | 80 return this->getEncodingValue(reg) >> HW_CHAN_SHIFT; in getHWRegChan() 84 return GET_REG_INDEX(getEncodingValue(Reg)); in getHWRegIndex()
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H A D | SIRegisterInfo.h | 137 return getEncodingValue(Reg) & 0xff; in getHWRegIndex()
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H A D | SIInsertWaitcnts.cpp | 468 unsigned Reg = TRI->getEncodingValue(AMDGPU::getMCReg(Op.getReg(), *ST)); in getRegInterval() 609 TRI->getEncodingValue(AMDGPU::getMCReg(DefMO.getReg(), *ST)), in updateByEvent() 1598 RegisterEncoding.VGPR0 = TRI->getEncodingValue(AMDGPU::VGPR0); in runOnMachineFunction() 1600 RegisterEncoding.SGPR0 = TRI->getEncodingValue(AMDGPU::SGPR0); in runOnMachineFunction()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64ExternalSymbolizer.cpp | 100 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand() 129 MCRI.getEncodingValue(MI.getOperand(1).getReg()) << 5; // Rn in tryAddingSymbolicOperand() 130 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // Rd in tryAddingSymbolicOperand()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | SIMCCodeEmitter.cpp | 413 RegEnc |= MRI.getEncodingValue(Reg); in getSDWASrcEncoding() 443 RegEnc |= MRI.getEncodingValue(Reg); in getSDWAVopcDstEncoding() 455 uint64_t Enc = MRI.getEncodingValue(Reg); in getAVOperandEncoding() 501 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
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H A D | R600MCCodeEmitter.cpp | 161 return MRI.getEncodingValue(RegNo) & HW_REG_MASK; in getHWReg() 170 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430MCCodeEmitter.cpp | 106 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue() 125 unsigned Reg = Ctx.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getMemOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFMCCodeEmitter.cpp | 92 return MRI.getEncodingValue(MO.getReg()); in getMachineOpValue() 171 Encoding = MRI.getEncodingValue(Op1.getReg()); in getMemoryOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
H A D | HexagonAsmPrinter.cpp | 376 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() 387 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() 399 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction() 411 unsigned Reg = RI->getEncodingValue(Rs.getReg()); in HexagonProcessInstruction() 596 unsigned Reg = RI->getEncodingValue(Rt.getReg()); in HexagonProcessInstruction()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
H A D | CSKYMCCodeEmitter.cpp | 56 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/AsmParser/ |
H A D | HexagonAsmParser.cpp | 1308 const unsigned Lower = RI->getEncodingValue(RegPair); in processInstruction() 1367 if (RI->getEncodingValue(Ry.getReg()) != RI->getEncodingValue(src.getReg())) in processInstruction() 1755 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction() 1779 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() 1796 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() 1813 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() 1833 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() 1856 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() 1899 unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg()); in processInstruction()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCCodeEmitter.cpp | 389 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2); in getTLSRegEncoding() 412 return 0x80 >> CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in get_crbitm_encoding() 443 return CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsOptionRecord.cpp | 78 unsigned EncVal = MCRegInfo->getEncodingValue(SubReg); in SetPhysRegUsed()
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H A D | MipsMCCodeEmitter.cpp | 98 unsigned Reg0 = Ctx.getRegisterInfo()->getEncodingValue(RegOp0); in LowerCompactBranch() 99 unsigned Reg1 = Ctx.getRegisterInfo()->getEncodingValue(RegOp1); in LowerCompactBranch() 739 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue() 1048 unsigned RegNo = Ctx.getRegisterInfo()->getEncodingValue(Reg); in getRegisterListOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
H A D | AArch64RegisterInfo.h | 34 return getEncodingValue(i); in getSEHRegNum()
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H A D | AArch64FalkorHWPFFix.cpp | 661 unsigned Dest = LI.DestReg ? TRI->getEncodingValue(LI.DestReg) : 0; in getTag() 662 unsigned Base = TRI->getEncodingValue(LI.BaseReg); in getTag() 670 Off = (1 << 5) | TRI->getEncodingValue(LI.OffsetOpnd->getReg()); in getTag()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
H A D | VEMCCodeEmitter.cpp | 104 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcMCCodeEmitter.cpp | 131 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
H A D | AVRMCCodeEmitter.cpp | 254 if (MO.isReg()) return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/ |
H A D | X86AsmParser.cpp | 3606 MRI->getEncodingValue(Inst.getOperand(0).getReg()) >= 8 || in processInstruction() 3607 MRI->getEncodingValue(Inst.getOperand(1).getReg()) < 8) in processInstruction() 3635 MRI->getEncodingValue(Inst.getOperand(0).getReg()) >= 8 || in processInstruction() 3636 MRI->getEncodingValue(Inst.getOperand(2).getReg()) < 8) in processInstruction() 3787 unsigned Dest = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() 3788 unsigned Mask = MRI->getEncodingValue(Inst.getOperand(1).getReg()); in validateInstruction() 3790 MRI->getEncodingValue(Inst.getOperand(3 + X86::AddrIndexReg).getReg()); in validateInstruction() 3820 unsigned Dest = MRI->getEncodingValue(Inst.getOperand(0).getReg()); in validateInstruction() 3822 MRI->getEncodingValue(Inst.getOperand(4 + X86::AddrIndexReg).getReg()); in validateInstruction() 3848 unsigned Src2Enc = MRI->getEncodingValue(Src2); in validateInstruction() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 4489 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4506 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4531 if (MRI->getEncodingValue(Reg) > MRI->getEncodingValue(EndReg)) in parseRegisterList() 4537 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4571 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4586 MRI->getEncodingValue(Reg) < MRI->getEncodingValue(OldReg)) { in parseRegisterList() 4597 EReg = MRI->getEncodingValue(Reg); in parseRegisterList() 4603 EReg = MRI->getEncodingValue(++Reg); in parseRegisterList() 6956 unsigned RtEncoding = MRI->getEncodingValue(Op2.getReg()); in fixupGNULDRDAlias() 7415 unsigned Rt = MRI->getEncodingValue(Reg1); in ParseInstruction() [all …]
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/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 807 .addImm(getEncodingValue(SrcReg) * 4) in lowerCRSpilling() 849 unsigned ShiftBits = getEncodingValue(DestReg)*4; in lowerCRRestore() 966 .addImm(getEncodingValue(SrcReg)) in lowerCRBitSpilling() 1011 unsigned ShiftBits = getEncodingValue(DestReg); in lowerCRBitRestore()
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