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Searched refs:getConstrainedRegClassForOperand (Results 1 – 5 of 5) sorted by relevance

/netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp105 = TRI.getConstrainedRegClassForOperand(Dst, *MRI); in constrainCopyLikeIntrin()
107 = TRI.getConstrainedRegClassForOperand(Src, *MRI); in constrainCopyLikeIntrin()
128 = TRI.getConstrainedRegClassForOperand(Dst, *MRI); in selectCOPY()
140 = TRI.getConstrainedRegClassForOperand(Src, *MRI); in selectCOPY()
173 TRI.getConstrainedRegClassForOperand(Dst, *MRI); in selectCOPY()
185 TRI.getConstrainedRegClassForOperand(MO, *MRI); in selectCOPY()
478 TRI.getConstrainedRegClassForOperand(I.getOperand(0), *MRI); in selectG_EXTRACT()
530 = TRI.getConstrainedRegClassForOperand(Src, *MRI); in selectG_MERGE_VALUES()
578 TRI.getConstrainedRegClassForOperand(Dst, *MRI); in selectG_UNMERGE_VALUES()
689 const TargetRegisterClass *RC = TRI.getConstrainedRegClassForOperand(MO, *MRI); in selectG_IMPLICIT_DEF()
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H A DSIRegisterInfo.h275 getConstrainedRegClassForOperand(const MachineOperand &MO,
H A DSIRegisterInfo.cpp2346 SIRegisterInfo::getConstrainedRegClassForOperand(const MachineOperand &MO, in getConstrainedRegClassForOperand() function in SIRegisterInfo
/netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h1084 getConstrainedRegClassForOperand(const MachineOperand &MO, in getConstrainedRegClassForOperand() function
/netbsd-src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp112 RegClass = TRI.getConstrainedRegClassForOperand(RegMO, MRI); in constrainOperandRegClass()