| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AVR/ |
| H A D | AVRTargetMachine.cpp | 31 static StringRef getCPU(StringRef CPU) { in getCPU() function
49 : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, in AVRTargetMachine()
52 SubTarget(TT, std::string(getCPU(CPU)), std::string(FS), *this) { in AVRTargetMachine()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| H A D | HexagonMCTargetDesc.cpp | 413 auto Existing = ArchSubtarget.find(std::string(STI->getCPU())); in getArchSubtarget()
520 if (STI->getCPU().contains("t")) { in addArchSubtarget()
523 STI->getCPU().substr(0, STI->getCPU().size() - 1), FS); in addArchSubtarget()
525 ArchSubtarget[std::string(STI->getCPU())] = in addArchSubtarget()
543 auto F = ElfFlags.find(STI.getCPU()); in GetELFFlags()
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| H A D | HexagonMCDuplexInfo.cpp | 640 if (STI.getCPU().equals_lower("hexagonv5") || in isOrderedDuplexPair()
641 STI.getCPU().equals_lower("hexagonv55") || in isOrderedDuplexPair()
642 STI.getCPU().equals_lower("hexagonv60")) { in isOrderedDuplexPair()
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| H A D | HexagonAsmBackend.cpp | 779 StringRef CPUString = Hexagon_MC::selectHexagonCPU(STI.getCPU()); in createHexagonAsmBackend()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Utils/ |
| H A D | AMDGPUBaseInfo.cpp | 417 auto Version = getIsaVersion(STI.getCPU()); in toString()
429 Processor = STI.getCPU().str(); in toString()
592 IsaVersion Version = getIsaVersion(STI->getCPU()); in getSGPRAllocGranule()
605 IsaVersion Version = getIsaVersion(STI->getCPU()); in getTotalNumSGPRs()
615 IsaVersion Version = getIsaVersion(STI->getCPU()); in getAddressableNumSGPRs()
626 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMinNumSGPRs()
645 IsaVersion Version = getIsaVersion(STI->getCPU()); in getMaxNumSGPRs()
663 IsaVersion Version = getIsaVersion(STI->getCPU()); in getNumExtraSGPRs()
766 IsaVersion Version = getIsaVersion(STI->getCPU()); in initDefaultAMDKernelCodeT()
802 IsaVersion Version = getIsaVersion(STI->getCPU()); in getDefaultAmdhsaKernelDescriptor()
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| /netbsd-src/external/apache2/llvm/dist/clang/lib/Basic/Targets/ |
| H A D | Mips.h | 174 const std::string &getCPU() const { return CPU; } in getCPU() function
180 CPU = getCPU(); in initFeatureMap()
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| H A D | Mips.cpp | 62 return llvm::StringSwitch<unsigned>(getCPU()) in getISARev()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/ |
| H A D | Disassembler.cpp | 174 if (DC->getCPU().empty()) in getItineraryLatency()
179 InstrItineraryData IID = STI->getInstrItineraryForCPU(DC->getCPU()); in getItineraryLatency()
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| H A D | Disassembler.h | 118 StringRef getCPU() const { return CPU; } in getCPU() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMTargetStreamer.cpp | 120 if (STI.getCPU() == "xscale") in getArchForCPU()
165 const StringRef CPUString = STI.getCPU(); in emitTargetAttributes()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| H A D | AMDGPUTargetStreamer.cpp | 304 IsaVersion IVersion = getIsaVersion(STI.getCPU()); in EmitAmdhsaKernelDescriptor()
536 return getElfMach(STI.getCPU()); in getEFlagsR600()
596 EFlagsV3 |= getElfMach(STI.getCPU()); in getEFlagsV3()
612 EFlagsV4 |= getElfMach(STI.getCPU()); in getEFlagsV4()
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| H A D | AMDGPUInstPrinter.cpp | 1392 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(STI.getCPU()); in printWaitFlag()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| H A D | MipsAsmBackend.cpp | 589 STI.getCPU(), Options); in createMipsAsmBackend()
590 return new MipsAsmBackend(T, MRI, STI.getTargetTriple(), STI.getCPU(), in createMipsAsmBackend()
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/ExecutionEngine/Orc/ |
| H A D | JITTargetMachineBuilder.h | 83 const std::string &getCPU() const { return CPU; } in getCPU() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| H A D | MCSubtargetInfo.h | 108 StringRef getCPU() const { return CPU; } in getCPU() function
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| H A D | AArch64SIMDInstrOpt.cpp | 222 std::string Subtarget = std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldReplaceInst()
293 std::string(SchedModel.getSubtargetInfo()->getCPU()); in shouldExitEarly()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUMCInstLower.cpp | 311 if (!MI->isPseudo() && STI.isCPUStringValid(STI.getCPU()) && in emitInstruction()
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| H A D | AMDGPUAsmPrinter.cpp | 153 IsaVersion Version = getIsaVersion(getGlobalSTI()->getCPU()); in emitStartOfAsmFile()
1230 if (getIsaVersion(getGlobalSTI()->getCPU()).Major >= 10) { in getSIProgramInfo()
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| H A D | SIMemoryLegalizer.cpp | 759 IV = getIsaVersion(ST.getCPU()); in SICacheControl()
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| H A D | GCNHazardRecognizer.cpp | 973 const AMDGPU::IsaVersion IV = AMDGPU::getIsaVersion(ST.getCPU()); in fixSMEMtoVectorWriteHazards()
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| H A D | SIInsertWaitcnts.cpp | 1580 IV = AMDGPU::getIsaVersion(ST->getCPU()); in runOnMachineFunction()
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| /netbsd-src/external/apache2/llvm/dist/llvm/bindings/ocaml/target/ |
| H A D | llvm_target.mli | 193 [llvm::TargetMachine::getCPU]. *)
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/ |
| H A D | AMDGPUAsmParser.cpp | 1293 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in AMDGPUAsmParser()
2687 if (AMDGPU::getIsaVersion(getSTI().getCPU()).Major < 6) in updateGprCountSymbols()
4451 IsaVersion Version = getIsaVersion(getSTI().getCPU()); in calculateGPRBlocks()
4499 IsaVersion IVersion = getIsaVersion(getSTI().getCPU()); in ParseDirectiveAMDHSAKernel()
4832 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in ParseDirectiveHSACodeObjectISA()
5986 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseCnt()
6022 AMDGPU::IsaVersion ISA = AMDGPU::getIsaVersion(getSTI().getCPU()); in parseSWaitCntOps()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| H A D | X86MCInstLower.cpp | 1349 (Subtarget->getCPU().empty() || Subtarget->getCPU() == "pentium3")) { in LowerPATCHABLE_OP()
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| /netbsd-src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 531 sti.getCPU(), Options)) { in MipsAsmParser()
566 if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode()) in MipsAsmParser()
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